[PATCH] D136448: [AMDGPU][GISel] Add llvm.amdgcn.icmp selection

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:893
+//  out in the test.
+//   Skipped pattern: Dst MI def isn't a register class(COPY:{ *:[i64] } ?:{ *:[i1] }:$src)
 def : Pat <
----------------
arsenm wrote:
> Pierre-vh wrote:
> > Help needed here, not sure how to get this one to work. I tried a lot of things, including COPY_TO_REGCLASS and nothing seems to do the trick.
> > Due to the simplicity of the pattern I'm wondering if it isn't better to just do it manually in the InstructionSelector rather than fight the GISel TableGen emitter?
> What's the error with COPY_TO_REGCLASS?
IIRC with COPY_TO_REGCLASS it's a type issue, or if I put some regclass that works then it just doesn't match in the instruction selector.
I think my question is more: What regclass do I need to use there?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136448/new/

https://reviews.llvm.org/D136448