[PATCH] D136319: [GISel] Rework trunc/shl combine in a generic trunc/shift combine

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh updated this revision to Diff 470082.
Pierre-vh added a comment.

- Remove misuse of `getPreferredShiftAmountTy`
- Only truncate right shifts to 32 bits for now. 16 bits doesn't seem to benefit any targets, I only observed regressions in our backend and no clear gains.
- Don't truncate right shifts if the trunc has any store users to prevent blocking truncstore combine.
  - I looked into adding support for the patterns generated by this new combine to the truncstore combine, but it's a complex combine so it's not immediately clear what needs to change. I also didn't observe any regressions caused by adding this restriction so it's not high-priority IMO.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136319/new/

https://reviews.llvm.org/D136319

Files:
  llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
  llvm/include/llvm/Target/GlobalISel/Combine.td
  llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-shift.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-shl.mir

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