[PATCH] D135593: [AArch64]]SME2 multi-vec to multi-vec FP/INT down convert 2/4 registers

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


================
Comment at: llvm/test/MC/AArch64/SME2/fcvtzs-diagnostics.s:9
+// CHECK-NEXT: fcvtzs {z0.s-z1.s}, {z0.s-z2.s}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
----------------
paulwalker-arm wrote:
> Hi @CarolineConcatto , nothing to hold up this patch but out of interest do you know why this `CHECK-NOT` line exists? We repeat the same idiom for all SVE/SME negative tests but I don't know what's special about this specific pattern for us to care so much.
The CHECK-NOT line is historically there because in the past we'd ended up with duplicate printing of the asm due to a bug in the assembler (D39894)


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https://reviews.llvm.org/D135593