[PATCH] D136432: [AMDGPU] Combine BFI instructions.

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:2160
+// However, before ISel, the expression will look like:
+// (X1 & C1) | (((X2 & C2) | (X3 & (~C1 | ~C3))))
+// In such cases, this function tries to find out if such case has occurred, by checking if 
----------------
Too many parens in this expression. The RHS should be just `((X2 & C2) | (X3 & (~C1 | ~C3)))`


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:2168
+    SDNode *X;
+    int64_t CVal;
+  };
----------------
uint32_t probably makes more sense since you are matching _B32 operations throughout.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h:265
                    uint32_t Width);
+  bool Select_BFI(SDNode *N);
   void SelectS_BFEFromShifts(SDNode *N);
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"SelectBFI" (no underscore) or "SelectV_BFI" for consistency.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136432/new/

https://reviews.llvm.org/D136432