[PATCH] D136422: [ARM] Fix the type for v4f16 duplane

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: samtebbs, lenary, SjoerdMeijer, labrinea.
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This was previously using the 32bit variant of the instruction, instead of the 16bit as intended.

Fixes #58512


https://reviews.llvm.org/D136422

Files:
  llvm/lib/Target/ARM/ARMInstrNEON.td
  llvm/test/CodeGen/ARM/armv8.2a-fp16-vector-intrinsics.ll


Index: llvm/test/CodeGen/ARM/armv8.2a-fp16-vector-intrinsics.ll
===================================================================
--- llvm/test/CodeGen/ARM/armv8.2a-fp16-vector-intrinsics.ll
+++ llvm/test/CodeGen/ARM/armv8.2a-fp16-vector-intrinsics.ll
@@ -1379,7 +1379,7 @@
 define dso_local <4 x half> @test_vdup_lane_f16(<4 x half> %a) {
 ; CHECK-LABEL: test_vdup_lane_f16:
 ; CHECK:       @ %bb.0: @ %entry
-; CHECK-NEXT:    vdup.32 d0, d0[3]
+; CHECK-NEXT:    vdup.16 d0, d0[3]
 ; CHECK-NEXT:    bx lr
 entry:
   %shuffle = shufflevector <4 x half> %a, <4 x half> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
Index: llvm/lib/Target/ARM/ARMInstrNEON.td
===================================================================
--- llvm/lib/Target/ARM/ARMInstrNEON.td
+++ llvm/lib/Target/ARM/ARMInstrNEON.td
@@ -6697,7 +6697,7 @@
 
 let Predicates = [HasNEON] in {
 def : Pat<(v4f16 (ARMvduplane (v4f16 DPR:$Vm), imm:$lane)),
-          (VDUPLN32d DPR:$Vm, imm:$lane)>;
+          (VDUPLN16d DPR:$Vm, imm:$lane)>;
 
 def : Pat<(v2f32 (ARMvduplane (v2f32 DPR:$Vm), imm:$lane)),
           (VDUPLN32d DPR:$Vm, imm:$lane)>;


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