[PATCH] D136015: [InstCombine] Fold series of instructions into mull

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

any chance we could get vector support/tests please?



================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp:1296
+      !match(YLo, m_And(m_Value(Y), m_SpecificInt(HalfMask))))
+    return nullptr;
+
----------------
What about if the AND has been removed by SimplifyDemandedBits? Maybe also test for KnownBits known leading zeros?


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  https://reviews.llvm.org/D136015/new/

https://reviews.llvm.org/D136015