[llvm] 5e5baf9 - [AArch64][SME] Remove get.pstatesm intrinsic.

[Sander de Smalen via llvm-commits]

Author: Sander de Smalen
Date: 2022-10-20T12:25:32Z
New Revision: 5e5baf917b95697dbfe0afe1a5c8298c547bc5ad

URL: https://github.com/llvm/llvm-project/commit/5e5baf917b95697dbfe0afe1a5c8298c547bc5ad
DIFF: https://github.com/llvm/llvm-project/commit/5e5baf917b95697dbfe0afe1a5c8298c547bc5ad.diff

LOG: [AArch64][SME] Remove get.pstatesm intrinsic.

This intrinsic can be removed in favour of using a call to
__arm_sme_state() directly and testing the LSB of X0.

In IR that would look like:

   %pstate = call aarch64_sme_preservemost_from_x2 {i64, i64} @__arm_sme_state()
   %pstate.x0 = extractvalue {i64, i64} %pstate, 0
   %pstate.sm = and i64 %pstate.x0, 1

Added: 
    

Modified: 
    llvm/include/llvm/IR/IntrinsicsAArch64.td
    llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Removed: 
    llvm/test/CodeGen/AArch64/sme-get-pstatesm.ll


################################################################################
diff  --git a/llvm/include/llvm/IR/IntrinsicsAArch64.td b/llvm/include/llvm/IR/IntrinsicsAArch64.td
index 3110abddcc1f4..0469672b021de 100644
--- a/llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ b/llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -2642,10 +2642,6 @@ let TargetPrefix = "aarch64" in {
   // PSTATE Functions
   //
 
-  def int_aarch64_sme_get_pstatesm
-      : DefaultAttrsIntrinsic<[llvm_i64_ty], [],
-                              [IntrReadMem, IntrInaccessibleMemOnly]>;
-
   def int_aarch64_sme_get_tpidr2
       : DefaultAttrsIntrinsic<[llvm_i64_ty], [],
                               [IntrNoMem, IntrHasSideEffects]>;

diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 1eadd8f660779..e7892c8d82dc0 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -4592,12 +4592,6 @@ SDValue AArch64TargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op,
     // changed.
     return DAG.getMergeValues({MS.getValue(0), MS.getValue(2)}, DL);
   }
-  case Intrinsic::aarch64_sme_get_pstatesm: {
-    SDValue Chain = Op->getOperand(0);
-    SMEAttrs Attrs(DAG.getMachineFunction().getFunction());
-    SDValue PStateSM = getPStateSM(DAG, Chain, Attrs, DL, Op.getValueType());
-    return DAG.getMergeValues({PStateSM, Chain}, DL);
-  }
   case Intrinsic::aarch64_sme_za_enable:
     return DAG.getNode(
         AArch64ISD::SMSTART, DL, MVT::Other,

diff  --git a/llvm/test/CodeGen/AArch64/sme-get-pstatesm.ll b/llvm/test/CodeGen/AArch64/sme-get-pstatesm.ll
deleted file mode 100644
index d92290f581efc..0000000000000
--- a/llvm/test/CodeGen/AArch64/sme-get-pstatesm.ll
+++ /dev/null
@@ -1,56 +0,0 @@
-; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -verify-machineinstrs -stop-after=finalize-isel < %s | FileCheck %s --check-prefix=CHECK-CSRMASK
-
-define i64 @get_pstatesm_normal() nounwind {
-; CHECK-LABEL: get_pstatesm_normal:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov x0, xzr
-; CHECK-NEXT:    ret
-  %pstate = call i64 @llvm.aarch64.sme.get.pstatesm()
-  ret i64 %pstate
-}
-
-define i64 @get_pstatesm_streaming() nounwind "aarch64_pstate_sm_enabled" {
-; CHECK-LABEL: get_pstatesm_streaming:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov w0, #1
-; CHECK-NEXT:    ret
-  %pstate = call i64 @llvm.aarch64.sme.get.pstatesm()
-  ret i64 %pstate
-}
-
-define i64 @get_pstatesm_locally_streaming() nounwind "aarch64_pstate_sm_body" {
-; CHECK-LABEL: get_pstatesm_locally_streaming:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    stp d15, d14, [sp, #-64]! // 16-byte Folded Spill
-; CHECK-NEXT:    stp d13, d12, [sp, #16] // 16-byte Folded Spill
-; CHECK-NEXT:    stp d11, d10, [sp, #32] // 16-byte Folded Spill
-; CHECK-NEXT:    stp d9, d8, [sp, #48] // 16-byte Folded Spill
-; CHECK-NEXT:    smstart sm
-; CHECK-NEXT:    smstop sm
-; CHECK-NEXT:    ldp d9, d8, [sp, #48] // 16-byte Folded Reload
-; CHECK-NEXT:    mov w0, #1
-; CHECK-NEXT:    ldp d11, d10, [sp, #32] // 16-byte Folded Reload
-; CHECK-NEXT:    ldp d13, d12, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT:    ldp d15, d14, [sp], #64 // 16-byte Folded Reload
-; CHECK-NEXT:    ret
-  %pstate = call i64 @llvm.aarch64.sme.get.pstatesm()
-  ret i64 %pstate
-}
-
-define i64 @get_pstatesm_streaming_compatible() nounwind "aarch64_pstate_sm_compatible" {
-; CHECK-LABEL: get_pstatesm_streaming_compatible:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-NEXT:    bl __arm_sme_state
-; CHECK-NEXT:    and x0, x0, #0x1
-; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-NEXT:    ret
-;
-; CHECK-CSRMASK-LABEL: name: get_pstatesm_streaming_compatible
-; CHECK-CSRMASK: BL &__arm_sme_state, csr_aarch64_sme_abi_support_routines_preservemost_from_x2
-  %pstate = call i64 @llvm.aarch64.sme.get.pstatesm()
-  ret i64 %pstate
-}
-
-declare i64 @llvm.aarch64.sme.get.pstatesm()