[PATCH] D136339: [MachineCombiner][RISCV] Relax optimization level requirement

[Anton Sidorenko via Phabricator via llvm-commits]

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Enable Machine Combiner for O1 <https://reviews.llvm.org/owners/package/1/>/O2 <https://reviews.llvm.org/owners/package/2/>/O3 <https://reviews.llvm.org/owners/package/3/> optimization levels. It makes RISCV
consistent with other targets running Machine Combiner.

Originally it was enabled only for -O3, however I looked through time reports
and usually it takes 0.1%-0.4% of total time, and never takes more than 1.0%.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136339

Files:
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
  llvm/test/CodeGen/RISCV/machine-combiner-mir.ll
  llvm/test/CodeGen/RISCV/machine-combiner.ll


Index: llvm/test/CodeGen/RISCV/machine-combiner.ll
===================================================================
--- llvm/test/CodeGen/RISCV/machine-combiner.ll
+++ llvm/test/CodeGen/RISCV/machine-combiner.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs -mcpu=sifive-u74 \
-; RUN: -O3 -enable-unsafe-fp-math -riscv-enable-machine-combiner=true < %s | \
+; RUN: -O1 -enable-unsafe-fp-math -riscv-enable-machine-combiner=true < %s | \
 ; RUN: FileCheck %s
 
 define double @test_reassoc_fadd1(double %a0, double %a1, double %a2, double %a3) {
Index: llvm/test/CodeGen/RISCV/machine-combiner-mir.ll
===================================================================
--- llvm/test/CodeGen/RISCV/machine-combiner-mir.ll
+++ llvm/test/CodeGen/RISCV/machine-combiner-mir.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 ; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs -mcpu=sifive-u74 \
-; RUN: -O3 -enable-unsafe-fp-math -riscv-enable-machine-combiner=true        \
+; RUN: -O1 -enable-unsafe-fp-math -riscv-enable-machine-combiner=true        \
 ; RUN: -stop-after machine-combiner < %s | FileCheck %s
 
 define double @test_reassoc_fadd1(double %a0, double %a1, double %a2, double %a3) {
Index: llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -268,7 +268,7 @@
 
 void RISCVPassConfig::addMachineSSAOptimization() {
   TargetPassConfig::addMachineSSAOptimization();
-  if (TM->getOptLevel() == CodeGenOpt::Aggressive && EnableMachineCombiner)
+  if (EnableMachineCombiner)
     addPass(&MachineCombinerID);
 
   if (TM->getTargetTriple().getArch() == Triple::riscv64)


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