[PATCH] D136319: [AMDGPU][GISel] Add trunc/shr combine

[Pierre van Houtryve via Phabricator via llvm-commits]

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We have a trunc/(shl, srl, sra) combine in the DAG.
The SHL is already handled by a generic combine, but there was no combine for right-shifts.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136319

Files:
  llvm/lib/Target/AMDGPU/AMDGPUCombine.td
  llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
  llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.h
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-right-shift.mir

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