[PATCH] D136157: [X86][2/2] Support PREFETCHI instructions
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 19 19:04:22 PDT 2022
pengfei added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:36839
+ MI.getOpcode() == X86::PREFETCHIT0 ? X86::PREFETCHT0 : X86::PREFETCHT1;
+ if (MI.getOperand(0).getReg() != X86::RIP) {
+ MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(Opc));
----------------
craig.topper wrote:
> Can we call setDesc instead of copying the operands?
Yeah, setDesc is perfect, thanks!
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136157/new/
https://reviews.llvm.org/D136157
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