[PATCH] D136157: [X86][2/2] Support PREFETCHI instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:36839
+        MI.getOpcode() == X86::PREFETCHIT0 ? X86::PREFETCHT0 : X86::PREFETCHT1;
+    if (MI.getOperand(0).getReg() != X86::RIP) {
+      MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(Opc));
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Can we call setDesc instead of copying the operands?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136157/new/

https://reviews.llvm.org/D136157