[llvm] 66e3589 - [NFC][CostModel] Added floating point frem test for SVE

[Jolanta Jensen via llvm-commits]

Author: Jolanta Jensen
Date: 2022-10-19T19:34:14Z
New Revision: 66e3589cd75d294e6717de02229116f0b1d44f4f

URL: https://github.com/llvm/llvm-project/commit/66e3589cd75d294e6717de02229116f0b1d44f4f
DIFF: https://github.com/llvm/llvm-project/commit/66e3589cd75d294e6717de02229116f0b1d44f4f.diff

LOG: [NFC][CostModel] Added floating point frem test for SVE

Differential Revision: https://reviews.llvm.org/D136241

Added: 
    

Modified: 
    llvm/test/Analysis/CostModel/AArch64/arith-fp-sve.ll

Removed: 
    


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diff  --git a/llvm/test/Analysis/CostModel/AArch64/arith-fp-sve.ll b/llvm/test/Analysis/CostModel/AArch64/arith-fp-sve.ll
index fdbff1d4c5d2..d7bb0498fd07 100644
--- a/llvm/test/Analysis/CostModel/AArch64/arith-fp-sve.ll
+++ b/llvm/test/Analysis/CostModel/AArch64/arith-fp-sve.ll
@@ -134,3 +134,29 @@ define void @fdiv() {
 
   ret void
 }
+
+define void @frem() {
+; CHECK-LABEL: 'frem'
+; CHECK-NEXT:  Cost Model: Invalid cost for instruction: %V4F16 = frem <vscale x 4 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Invalid cost for instruction: %V8F16 = frem <vscale x 8 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Invalid cost for instruction: %V16F16 = frem <vscale x 16 x half> undef, undef
+; CHECK-NEXT:  Cost Model: Invalid cost for instruction: %V2F32 = frem <vscale x 2 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Invalid cost for instruction: %V4F32 = frem <vscale x 4 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Invalid cost for instruction: %V8F32 = frem <vscale x 8 x float> undef, undef
+; CHECK-NEXT:  Cost Model: Invalid cost for instruction: %V2F64 = frem <vscale x 2 x double> undef, undef
+; CHECK-NEXT:  Cost Model: Invalid cost for instruction: %V4F64 = frem <vscale x 4 x double> undef, undef
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %V4F16 = frem <vscale x 4 x half> undef, undef
+  %V8F16 = frem <vscale x 8 x half> undef, undef
+  %V16F16 = frem <vscale x 16 x half> undef, undef
+
+  %V2F32 = frem <vscale x 2 x float> undef, undef
+  %V4F32 = frem <vscale x 4 x float> undef, undef
+  %V8F32 = frem <vscale x 8 x float> undef, undef
+
+  %V2F64 = frem <vscale x 2 x double> undef, undef
+  %V4F64 = frem <vscale x 4 x double> undef, undef
+
+  ret void
+}