[PATCH] D136267: [AMDGPU] Speedup GCNDownwardRPTracker::advanceBeforeNext
Valery Pykhtin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 19 09:59:28 PDT 2022
vpykhtin created this revision.
vpykhtin added reviewers: rampitec, kerbowa, arsenm.
Herald added subscribers: kosarev, foad, hiraditya, t-tye, tpr, dstuttard, yaxunl, jvesely, kzhuravl.
Herald added a project: All.
vpykhtin requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
The function makes liveness tests for the entire live register set for every instruction it passes by.
This becomes very slow on high RP regions such as ASAN enabled code.
Instead only uses of last tracked instruction should be tested and this greatly improves compilation time.
This patch revealed few bugs in SIFormMemoryClauses and PreRARematStage::sinkTriviallyRematInsts which should
be fixed first.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D136267
Files:
llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
Index: llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
+++ llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
@@ -354,6 +354,11 @@
bool GCNDownwardRPTracker::advanceBeforeNext() {
assert(MRI && "call reset first");
+ if (!LastTrackedMI)
+ return true;
+
+ auto const RegUses = collectVirtualRegUses(*LastTrackedMI, LIS, *MRI);
+ // each RegUnit is unique in RegUses
NextMI = skipDebugInstructionsForward(NextMI, MBBEnd);
if (NextMI == MBBEnd)
@@ -363,23 +368,29 @@
assert(SI.isValid());
// Remove dead registers or mask bits.
- for (auto &It : LiveRegs) {
- const LiveInterval &LI = LIS.getInterval(It.first);
+ for (auto &U : RegUses) {
+ const LiveInterval &LI = LIS.getInterval(U.RegUnit);
if (LI.hasSubRanges()) {
+ auto It = LiveRegs.end();
for (const auto &S : LI.subranges()) {
if (!S.liveAt(SI)) {
- auto PrevMask = It.second;
- It.second &= ~S.LaneMask;
- CurPressure.inc(It.first, PrevMask, It.second, *MRI);
+ if (It == LiveRegs.end()) {
+ It = LiveRegs.find(U.RegUnit);
+ assert(It != LiveRegs.end());
+ }
+ auto PrevMask = It->second;
+ It->second &= ~S.LaneMask;
+ CurPressure.inc(U.RegUnit, PrevMask, It->second, *MRI);
}
}
+ if (It != LiveRegs.end() && It->second.none())
+ LiveRegs.erase(It);
} else if (!LI.liveAt(SI)) {
- auto PrevMask = It.second;
- It.second = LaneBitmask::getNone();
- CurPressure.inc(It.first, PrevMask, It.second, *MRI);
+ auto It = LiveRegs.find(U.RegUnit);
+ assert(It != LiveRegs.end());
+ CurPressure.inc(U.RegUnit, It->second, LaneBitmask::getNone(), *MRI);
+ LiveRegs.erase(It);
}
- if (It.second.none())
- LiveRegs.erase(It.first);
}
MaxPressure = max(MaxPressure, CurPressure);
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