[PATCH] D135324: [AArch64-SVE]: force using SVE in streaming mode to lower arithmetic and logical fixed-width vector ops.
Hassnaa Hamdi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 19 09:26:57 PDT 2022
hassnaa-arm added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:22383
+ assert(useSVEForFixedLengthVectorVT(
+ VT, Subtarget->forceStreamingCompatibleSVE()) &&
"Only expected to lower fixed length vector operation!");
----------------
paulwalker-arm wrote:
> hassnaa-arm wrote:
> > paulwalker-arm wrote:
> > > When we hit a similar issue with `LowerToPredicatedOp()` we decide to drop the calls to `useSVEForFixedLengthVectorVT()` in favour or just using `VT.isFixedLengthVector() && isTypeLegal(VT)`. Would the same work in your case?
> > Sorry, I don't understand.
> > you mean dropping the call for `useSVEForFixedLengthVectorVT(...) `?
> > or you mean using use `SVEForFixedLengthVectorVT(VT)` without passing the ovrrideNEON parameter ?
> The former, so you can drop the call to `useSVEForFixedLengthVectorVT()` and instead have `assert(VT.isFixedLengthVector() && isTypeLegal(VT) && ...`. By this point we should be working with only legal types and there's no harm in handling any of them.
why do you suggest that instead of using `useSVEForFixedLengthVectorVT()` ?
and why do you suggest it for `LowerToPredicatedOp()` only not also other lowering functions ?
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https://reviews.llvm.org/D135324/new/
https://reviews.llvm.org/D135324
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