[PATCH] D135455: [AArch64] SME2 Single-multi vector ternary int/FP 2 and 4 registers

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:3314
     {"sme-i64", {AArch64::FeatureSMEI64}},
+    {"sme2", {AArch64::FeatureSME2}},
     {"hbc", {AArch64::FeatureHBC}},
----------------
CarolineConcatto wrote:
> sdesmalen wrote:
> > Should this be part of this patch? Or was this supposed to be part of D135448 ?
> Yes, maybe. But this is first patch that I added sme2 instructions, that is the reason I only added now. What would you like me to do? Remove from this line from this patch and create another one, only to add this flag or is it fine if we leave here?
> 
> 
I mostly just wanted to understand it. Sounds like it couldn't be tested before, but in your current patch you're not testing this change either. Maybe you can add a test similar to `llvm/test/MC/AArch64/SVE2/directive-arch.s`, but then for SME2? (we should have added a similar test for SME).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135455/new/

https://reviews.llvm.org/D135455