[PATCH] D135468: [AArch64]SME2 Multiple vector ternary int/float 2 and 4 registers

[Caroline via Phabricator via llvm-commits]

CarolineConcatto marked an inline comment as done.
CarolineConcatto added inline comments.


================
Comment at: llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp:648
+                                                const void *Decoder) {
+  if (RegNo * 4 > 30)
+    return Fail;
----------------
paulwalker-arm wrote:
> 28?
Yes, sorry! 


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D135468/new/

https://reviews.llvm.org/D135468