[PATCH] D136169: [AMDGPU] Avoid SCC clobbering before S_CSELECT_B32

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2231-2232
+          SCCCopy = RS->scavengeRegister(getBoolRC(), MI, 0, !UseSGPR);
+          if (!SCCCopy)
+            report_fatal_error("Cannot scavenge register in FI elimination!");
+          P = BuildMI(*MBB, MI, DL,
----------------
This still makes me nervous. For graphics we use LLVM as a JIT compiler, and we definitely have cases where SGPRs are spilled (so presumably there are no free SGPRs). What are we supposed to do if this scavenge fails?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136169/new/

https://reviews.llvm.org/D136169