[llvm] 3ee58e2 - [X86] Add WRMSRNS instructions.

[Freddy Ye via llvm-commits]

Author: Freddy Ye
Date: 2022-10-19T13:04:11+08:00
New Revision: 3ee58e2f355f8fdb8e0fe29dc366c8833fafa7d3

URL: https://github.com/llvm/llvm-project/commit/3ee58e2f355f8fdb8e0fe29dc366c8833fafa7d3
DIFF: https://github.com/llvm/llvm-project/commit/3ee58e2f355f8fdb8e0fe29dc366c8833fafa7d3.diff

LOG: [X86] Add WRMSRNS instructions.

For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D135935

Added: 
    llvm/test/MC/Disassembler/X86/wrmsrns.txt
    llvm/test/MC/X86/wrmsrns.s

Modified: 
    llvm/docs/ReleaseNotes.rst
    llvm/lib/Target/X86/X86InstrSystem.td

Removed: 
    


################################################################################
diff  --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 1969092736378..536d1c7cc3ef3 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -137,6 +137,7 @@ Changes to the X86 Backend
 --------------------------
 
 * Add support for the ``RDMSRLIST and WRMSRLIST`` instructions.
+* Add support for the ``WRMSRNS`` instruction.
 
 Changes to the OCaml bindings
 -----------------------------

diff  --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index 96bb6e3f5661c..ca981f58908e3 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -425,6 +425,8 @@ def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
 let SchedRW = [WriteSystem] in {
 let Uses = [EAX, ECX, EDX] in
 def WRMSR : I<0x30, RawFrm, (outs), (ins), "wrmsr", []>, TB;
+let Uses = [EAX, ECX, EDX] in
+def WRMSRNS : I<0x01, MRM_C6, (outs), (ins), "wrmsrns", []>, PS;
 let Defs = [EAX, EDX], Uses = [ECX] in
 def RDMSR : I<0x32, RawFrm, (outs), (ins), "rdmsr", []>, TB;
 

diff  --git a/llvm/test/MC/Disassembler/X86/wrmsrns.txt b/llvm/test/MC/Disassembler/X86/wrmsrns.txt
new file mode 100644
index 0000000000000..4d69dc546eed3
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/wrmsrns.txt
@@ -0,0 +1,8 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+# RUN: llvm-mc --disassemble %s -triple=i386 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=i386 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT:   wrmsrns
+# INTEL: wrmsrns
+0x0f,0x01,0xc6

diff  --git a/llvm/test/MC/X86/wrmsrns.s b/llvm/test/MC/X86/wrmsrns.s
new file mode 100644
index 0000000000000..75595d2e8ab72
--- /dev/null
+++ b/llvm/test/MC/X86/wrmsrns.s
@@ -0,0 +1,8 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple i386 --show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple i386 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: wrmsrns
+// CHECK: encoding: [0x0f,0x01,0xc6]
+          wrmsrns