[llvm] e3df4ba - [X86] Add MSRLIST instructions.
Freddy Ye via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 18 19:37:53 PDT 2022
Author: Freddy Ye
Date: 2022-10-19T10:35:42+08:00
New Revision: e3df4ba9d277457be944ffa8c711cb45a9b3e240
URL: https://github.com/llvm/llvm-project/commit/e3df4ba9d277457be944ffa8c711cb45a9b3e240
DIFF: https://github.com/llvm/llvm-project/commit/e3df4ba9d277457be944ffa8c711cb45a9b3e240.diff
LOG: [X86] Add MSRLIST instructions.
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
Reviewed By: skan, RKSimon
Differential Revision: https://reviews.llvm.org/D135934
Added:
llvm/test/MC/Disassembler/X86/x86-64-msrlist.txt
llvm/test/MC/X86/x86-64-msrlist.s
Modified:
llvm/docs/ReleaseNotes.rst
llvm/lib/Target/X86/X86InstrSystem.td
Removed:
################################################################################
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 292efe0cab2fb..1969092736378 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -136,6 +136,8 @@ Changes to the Windows Target
Changes to the X86 Backend
--------------------------
+* Add support for the ``RDMSRLIST and WRMSRLIST`` instructions.
+
Changes to the OCaml bindings
-----------------------------
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index b1ca872790072..96bb6e3f5661c 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -428,6 +428,11 @@ def WRMSR : I<0x30, RawFrm, (outs), (ins), "wrmsr", []>, TB;
let Defs = [EAX, EDX], Uses = [ECX] in
def RDMSR : I<0x32, RawFrm, (outs), (ins), "rdmsr", []>, TB;
+let Uses = [RSI, RDI, RCX], Predicates = [In64BitMode] in {
+def WRMSRLIST : I<0x01, MRM_C6, (outs), (ins), "wrmsrlist", []>, XS;
+def RDMSRLIST : I<0x01, MRM_C6, (outs), (ins), "rdmsrlist", []>, XD;
+}
+
let Defs = [RAX, RDX], Uses = [ECX] in
def RDPMC : I<0x33, RawFrm, (outs), (ins), "rdpmc", []>, TB;
diff --git a/llvm/test/MC/Disassembler/X86/x86-64-msrlist.txt b/llvm/test/MC/Disassembler/X86/x86-64-msrlist.txt
new file mode 100644
index 0000000000000..ce01a717d35b5
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/x86-64-msrlist.txt
@@ -0,0 +1,10 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT: rdmsrlist
+# INTEL: rdmsrlist
+0xf2,0x0f,0x01,0xc6
+
+# ATT: wrmsrlist
+# INTEL: wrmsrlist
+0xf3,0x0f,0x01,0xc6
diff --git a/llvm/test/MC/X86/x86-64-msrlist.s b/llvm/test/MC/X86/x86-64-msrlist.s
new file mode 100644
index 0000000000000..7e7866141fe7e
--- /dev/null
+++ b/llvm/test/MC/X86/x86-64-msrlist.s
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: rdmsrlist
+// CHECK: encoding: [0xf2,0x0f,0x01,0xc6]
+ rdmsrlist
+
+// CHECK: wrmsrlist
+// CHECK: encoding: [0xf3,0x0f,0x01,0xc6]
+ wrmsrlist
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