[PATCH] D136220: [LoongArch] Fix 32-bit and 64-bit atomicrmw nand operand order errors
Gong LingQin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 18 19:18:29 PDT 2022
gonglingqin created this revision.
gonglingqin added reviewers: xen0n, xry111, SixWeining, wangleiat, MaskRay, lrzlin.
Herald added subscribers: StephenFan, hiraditya.
Herald added a project: All.
gonglingqin requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D136220
Files:
llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
Index: llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
===================================================================
--- llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
+++ llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
@@ -547,10 +547,10 @@
; LA32: # %bb.0:
; LA32-NEXT: .LBB14_1: # =>This Inner Loop Header: Depth=1
; LA32-NEXT: dbar 0
-; LA32-NEXT: ll.w $a2, $a1, 0
-; LA32-NEXT: and $a3, $a2, $a0
+; LA32-NEXT: ll.w $a2, $a0, 0
+; LA32-NEXT: and $a3, $a2, $a1
; LA32-NEXT: nor $a3, $a3, $zero
-; LA32-NEXT: sc.w $a3, $a1, 0
+; LA32-NEXT: sc.w $a3, $a0, 0
; LA32-NEXT: beqz $a3, .LBB14_1
; LA32-NEXT: # %bb.2:
; LA32-NEXT: move $a0, $a2
@@ -560,10 +560,10 @@
; LA64: # %bb.0:
; LA64-NEXT: .LBB14_1: # =>This Inner Loop Header: Depth=1
; LA64-NEXT: dbar 0
-; LA64-NEXT: ll.w $a2, $a1, 0
-; LA64-NEXT: and $a3, $a2, $a0
+; LA64-NEXT: ll.w $a2, $a0, 0
+; LA64-NEXT: and $a3, $a2, $a1
; LA64-NEXT: nor $a3, $a3, $zero
-; LA64-NEXT: sc.w $a3, $a1, 0
+; LA64-NEXT: sc.w $a3, $a0, 0
; LA64-NEXT: beqz $a3, .LBB14_1
; LA64-NEXT: # %bb.2:
; LA64-NEXT: move $a0, $a2
@@ -587,10 +587,10 @@
; LA64: # %bb.0:
; LA64-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1
; LA64-NEXT: dbar 0
-; LA64-NEXT: ll.d $a2, $a1, 0
-; LA64-NEXT: and $a3, $a2, $a0
+; LA64-NEXT: ll.d $a2, $a0, 0
+; LA64-NEXT: and $a3, $a2, $a1
; LA64-NEXT: nor $a3, $a3, $zero
-; LA64-NEXT: sc.d $a3, $a1, 0
+; LA64-NEXT: sc.d $a3, $a0, 0
; LA64-NEXT: beqz $a3, .LBB15_1
; LA64-NEXT: # %bb.2:
; LA64-NEXT: move $a0, $a2
Index: llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
===================================================================
--- llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+++ llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
@@ -1194,7 +1194,7 @@
def : AtomicPat<int_loongarch_masked_atomicrmw_sub_i64,
PseudoMaskedAtomicLoadSub32>;
def : Pat<(atomic_load_nand_64 GPR:$rj, GPR:$rk),
- (PseudoAtomicLoadNand64 GPR:$rk, GPR:$rj)>;
+ (PseudoAtomicLoadNand64 GPR:$rj, GPR:$rk)>;
def : AtomicPat<int_loongarch_masked_atomicrmw_nand_i64,
PseudoMaskedAtomicLoadNand32>;
def : Pat<(atomic_load_add_32 GPR:$rj, GPR:$rk),
@@ -1228,7 +1228,7 @@
} // Predicates = [IsLA64]
def : Pat<(atomic_load_nand_32 GPR:$rj, GPR:$rk),
- (PseudoAtomicLoadNand32 GPR:$rk, GPR:$rj)>;
+ (PseudoAtomicLoadNand32 GPR:$rj, GPR:$rk)>;
let Predicates = [IsLA32] in {
def : AtomicPat<int_loongarch_masked_atomicrmw_xchg_i32,
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