[PATCH] D136169: [AMDGPU] Avoid SCC clobbering before S_CSELECT_B32

[Alexander via Phabricator via llvm-commits]

alex-t marked an inline comment as done.
alex-t added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2247
+          SCCCopy = RS->scavengeRegister(getBoolRC(), MI, 0, !UseSGPR);
+          if (SCCCopy != AMDGPU::NoRegister)
+            BuildMI(*MBB, MI, DL,
----------------
arsenm wrote:
> foad wrote:
> > Don't need the ` != AMDGPU::NoRegister` because Register converts to bool.
> > 
> > Need braces around the multi-line BuildMI call.
> So this just remains broken if the scavenge failed?
For now, I would opt for reporting fatal here.
We could try to use v_add for those targets which allow v_add with the SGPR and constant if the frame index user accepts VGPR. This will give a chance in some cases but not in general.


Repository:
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  https://reviews.llvm.org/D136169/new/

https://reviews.llvm.org/D136169