[PATCH] D136169: [AMDGPU] Avoid SCC clobbering before S_CSELECT_B32

Tue Oct 18 10:05:38 PDT 2022

alex-t added a comment.

In D136169#3865217 <https://reviews.llvm.org/D136169#3865217>, @foad wrote:

>> It queries the scavenger for SGPR and
>> if available saves SCC to it and restore its value after frame lowering code
>> insertion.
>
> What if there is no free SGPR? I don't think it's acceptable to generate broken code in that case.

I expected this question and deliberately leave this for discussion. I think that the proper behavior is to report error and bail out.
No alternatives look good to me.
Attempt to use V_ADD_* is unreliable as it assumes to scavenge register again which is also not guaranteed. 
Moving the S_ADD_I32 insertion point may be unsolvable due to the data dependence problem

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136169/new/

https://reviews.llvm.org/D136169