[PATCH] D135324: [AArch64-SVE]: force using SVE in streaming mode to lower arithmetic and logical fixed-width vector ops.

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 18 05:32:41 PDT 2022


sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:15747
+    EVT scalableContainerVT = getContainerForFixedLengthVector(DAG, VT);
+    SDValue scalableLHS =
+        convertToScalableVector(DAG, scalableContainerVT, LHS);
----------------
nit: In LLVM the style is to start local variables with an upper-case, i.e. ScalableLHS.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-arith.ll:65-92
+define void @add_v64i8(<64 x i8>* %a, <64 x i8>* %b) #0 {
+; CHECK-LABEL: add_v64i8:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov w8, #32
+; CHECK-NEXT:    mov w9, #48
+; CHECK-NEXT:    mov w10, #16
+; CHECK-NEXT:    ptrue p0.b, vl16
----------------
I think this test can be removed, because you've already covered the "twice as wide" case (32 x i8) which ensures we don't emit any other instructions not valid in streaming mode. The "four times as wide' should already be covered by `sve-fixed-length-int-arith.ll`.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-arith.ll:150
+
+define void @add_v32i16(<32 x i16>* %a, <32 x i16>* %b) #0 {
+; CHECK-LABEL: add_v32i16:
----------------
This test can be removed for the same reason as mentioned above.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-arith.ll:223
+
+define void @add_v16i32(<16 x i32>* %a, <16 x i32>* %b) #0 {
+; CHECK-LABEL: add_v16i32:
----------------
This test can be removed for the same reason as mentioned above.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-arith.ll:296
+
+define void @add_v8i64(<8 x i64>* %a, <8 x i64>* %b) #0 {
+; CHECK-LABEL: add_v8i64:
----------------
This test can be removed for the same reason as mentioned above.

(same for all other 4 x as wide instances in the remainder of this file and other files in this patch)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135324/new/

https://reviews.llvm.org/D135324



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