[PATCH] D136153: [AArch64] Allow cost computation for interleaved accesses

[mgabka via Phabricator via llvm-commits]

mgabka created this revision.
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  This commit is moving the rejection of scalable
    vectors in the loop vectorization up to the target specific cost model.
    Before this change for interleaved memory accesses there was an early
    rejection from inside the loop vectorizer cost model.
  
    The BasicTTIImplBase returns invalid cost for scalable vectors
    what should be enough for other backends to use.
  
    AArch64 will still return invalid cost for scalable vectors
    for interleaved accesses as more work is required to enable it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136153

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll

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