[PATCH] D136142: [AArch64]SME2 MOV Instructions
Caroline via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 18 01:32:01 PDT 2022
CarolineConcatto created this revision.
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This patch adds the assembly/disassembly for the following instructions:
MOVA (array to vector, four registers): Move four ZA single-vector groups to four vector registers.
(array to vector, two registers): Move two ZA single-vector groups to two vector registers.
(tile to vector, four registers): Move four ZA tile slices to four vector registers.
(tile to vector, single): Move ZA tile slice to vector register.
(tile to vector, two registers): Move two ZA tile slices to two vector registers.
(vector to array, four registers): Move four vector registers to four ZA single-vector groups.
(vector to array, two registers): Move two vector registers to two ZA single-vector groups.
(vector to tile, four registers): Move four vector registers to four ZA tile slices.
(vector to tile, single): Move vector register to ZA tile slice.
(vector to tile, two registers): Move two vector registers to two ZA tile slices.
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09
It add more sizes for Matrix Operand:
MatrixOp8 and MatrixOp16
two implicit operands uimm0s2range and uimm0s4range.
and uimm1s2range that are immediates
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D136142
Files:
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64RegisterInfo.td
llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AArch64/SMEInstrFormats.td
llvm/test/MC/AArch64/SME2/mova-diagnostics.s
llvm/test/MC/AArch64/SME2/mova.s
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