[llvm] 6102364 - [ARM] Add additional targets to divide tests.

Keith Walker via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 17 08:55:15 PDT 2022


Author: Keith Walker
Date: 2022-10-17T16:51:17+01:00
New Revision: 6102364b0d0e16d63cc38c74a2a315a75253b4e8

URL: https://github.com/llvm/llvm-project/commit/6102364b0d0e16d63cc38c74a2a315a75253b4e8
DIFF: https://github.com/llvm/llvm-project/commit/6102364b0d0e16d63cc38c74a2a315a75253b4e8.diff

LOG: [ARM] Add additional targets to divide tests.

The main motivation for these additional targets is to cover the
differences in the instructions available between Thumb2 and Thumb1.

Ths shows up in these test due to the lack of the following in
Thumb1:
- Mulitply and Subtract instruction (mls) - used when calculating
  a remainder.
- Unsigned Muliple Long instruction (umull) - used in certain
  cases when optimising division with a constant.

Differential Revision: https://reviews.llvm.org/D135875

Added: 
    

Modified: 
    llvm/test/CodeGen/ARM/div.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/ARM/div.ll b/llvm/test/CodeGen/ARM/div.ll
index aba8c143310e3..935aeaab8dc59 100644
--- a/llvm/test/CodeGen/ARM/div.ll
+++ b/llvm/test/CodeGen/ARM/div.ll
@@ -1,20 +1,27 @@
-; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a8    | \
-; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-SWDIV
-; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=swift        | \
-; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV
-; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r4    | \
-; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-SWDIV
-; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r4f   | \
-; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-SWDIV
-; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r5    | \
-; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV
-; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8    | \
-; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=armv7ve-none-linux-gnu           | \
-; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV
-; RUN: llc < %s -mtriple=thumbv7ve-none-linux-gnu         | \
-; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV \
-; RUN:                  -check-prefix=CHECK-THUMB
+; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a8      | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-SWDIV
+; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=swift          | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-HWDIV,CHECK-HWDIV-ARM-OR-THUMB2
+; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r4      | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-SWDIV
+; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r4f     | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-SWDIV
+; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r5      | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-HWDIV,CHECK-HWDIV-ARM-OR-THUMB2
+; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8      | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-EABI
+; RUN: llc < %s -mtriple=armv7 -mcpu=cortex-a7              | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-HWDIV,CHECK-HWDIV-ARM-OR-THUMB2
+; RUN: llc < %s -mtriple=armv7 -mcpu=cortex-a7 -march=thumb | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-HWDIV,CHECK-THUMB,CHECK-HWDIV-ARM-OR-THUMB2
+; RUN: llc %s -o - -mtriple=thumbv8m.main -mcpu=cortex-m33  | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-HWDIV,CHECK-THUMB,CHECK-HWDIV-ARM-OR-THUMB2
+; RUN: llc < %s -mtriple=thumbv8m.base -mcpu=cortex-m23     | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-HWDIV,CHECK-THUMB,CHECK-HWDIV-THUMB1
+; RUN: llc < %s -mtriple=armv7ve-none-linux-gnu             | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-HWDIV
+; RUN: llc < %s -mtriple=thumbv7ve-none-linux-gnu           | \
+; RUN:     FileCheck %s -check-prefixes=CHECK,CHECK-HWDIV,CHECK-THUMB
 
 define i32 @f1(i32 %a, i32 %b) {
 entry:
@@ -49,7 +56,9 @@ entry:
 
 ; CHECK-THUMB: .thumb_func
 ; CHECK-HWDIV: sdiv
-; CHECK-HWDIV: mls
+; CHECK-HWDIV-ARM-OR-THUMB2-NEXT: mls
+; CHECK-HWDIV-THUMB1-NEXT: muls
+; CHECK-HWDIV-THUMB1-NEXT: subs
 
 ; EABI MODE = Remainder in R1, quotient in R0
 ; CHECK-EABI: __aeabi_idivmod
@@ -65,7 +74,9 @@ entry:
 
 ; CHECK-THUMB: .thumb_func
 ; CHECK-HWDIV: udiv
-; CHECK-HWDIV: mls
+; CHECK-HWDIV-ARM-OR-THUMB2-NEXT: mls
+; CHECK-HWDIV-THUMB1-NEXT: muls
+; CHECK-HWDIV-THUMB1-NEXT: subs
 
 ; EABI MODE = Remainder in R1, quotient in R0
 ; CHECK-EABI: __aeabi_uidivmod
@@ -107,30 +118,30 @@ entry:
 
 ; Make sure we avoid a libcall for some constants.
 define i64 @f7(i64 %a) {
-; CHECK-SWDIV-LABEL: f7
+; CHECK-LABEL: f7
 ; CHECK-SWDIV: adc
 ; CHECK-SWDIV: umull
-; CHECK-HWDIV-LABEL: f7
-; CHECK-HWDIV: adc
-; CHECK-HWDIV: umull
-; CHECK-EABI-LABEL: f7
+; CHECK-HWDIV-ARM-OR-THUMB2: adc
+; CHECK-HWDIV-ARM-OR-THUMB2: umull
 ; CHECK-EABI: adc
 ; CHECK-EABI: umull
+; No 32-bit => 64-bit HW multiply instruction prevents optimisation
+; CHECK-HWDIV-THUMB1: __umoddi3
   %tmp1 = urem i64 %a, 3
   ret i64 %tmp1
 }
 
 ; Make sure we avoid a libcall for some constants.
 define i64 @f8(i64 %a) {
-; CHECK-SWDIV-LABEL: f8
+; CHECK-LABEL: f8
 ; CHECK-SWDIV: adc
 ; CHECK-SWDIV: umull
-; CHECK-HWDIV-LABEL: f8
-; CHECK-HWDIV: adc
-; CHECK-HWDIV: umull
-; CHECK-EABI-LABEL: f8
+; CHECK-HWDIV-ARM-OR-THUMB2: adc
+; CHECK-HWDIV-ARM-OR-THUMB2: umull
 ; CHECK-EABI: adc
 ; CHECK-EABI: umull
+; No 32-bit => 64-bit HW multiply instruction prevents optimisation
+; CHECK-HWDIV-THUMB1: __udivdi3
   %tmp1 = udiv i64 %a, 3
   ret i64 %tmp1
 }


        


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