[PATCH] D135733: AMDGPU: Treat asm as a hazard for all register read-after-write hazards

[Austin Kerbow via Phabricator via llvm-commits]

kerbowa added a comment.

In D135733#3855154 <https://reviews.llvm.org/D135733#3855154>, @foad wrote:

> Could you detect empty inline asms and do this only for the non-empty ones? In graphics we use empty inline asms as some kind of scheduling barrier. (Granted this is just a workaround for problems elsewhere, but I don't really want it broken or penalised just now.)

Could you use llvm.amdgcn.sched.barrier instead?


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