[PATCH] D135441: [AArch64][SelectionDAG] Lower multiplication by a constant to shl+add+shl+add

[Allen zhong via Phabricator via llvm-commits]

Allen updated this revision to Diff 468208.
Allen edited the summary of this revision.
Allen added a comment.

Add condition ShiftM1 <= 3 && ShiftM1 <= 3 for LSLFast


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135441/new/

https://reviews.llvm.org/D135441

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/mul_pow2.ll

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