[PATCH] D135468: [AArch64]SME2 Multiple vector ternary int/float 2 and 4 registers

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp:648
+                                                const void *Decoder) {
+  if (RegNo * 4 > 30)
+    return Fail;
----------------
28?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135468/new/

https://reviews.llvm.org/D135468