[PATCH] D136051: [CodeGen] Introduce a flag to allow same cycle def-use schedule

[Suyog Sarda via Phabricator via llvm-commits]

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Some targets may allow def-use scheduling within same cycle. Introduce a flag in Pipeliner to allow the same.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136051

Files:
  llvm/lib/CodeGen/MachinePipeliner.cpp
  llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp


Index: llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
===================================================================
--- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -117,6 +117,8 @@
                                         cl::init(true),
                                         cl::desc("Enable instsimplify"));
 
+extern cl::opt<bool> AllowDefUseInSameCycle;
+
 /// HexagonTargetMachineModule - Note that this is used on hosts that
 /// cannot link in a library unless there are references into the
 /// library.  In particular, it seems that it is not possible to get
@@ -239,6 +241,8 @@
           (HexagonNoOpt ? CodeGenOpt::None : OL)),
       TLOF(std::make_unique<HexagonTargetObjectFile>()) {
   initializeHexagonExpandCondsetsPass(*PassRegistry::getPassRegistry());
+  if (!AllowDefUseInSameCycle.getPosition())
+    AllowDefUseInSameCycle = true;
   initAsmInfo();
 }
 
Index: llvm/lib/CodeGen/MachinePipeliner.cpp
===================================================================
--- llvm/lib/CodeGen/MachinePipeliner.cpp
+++ llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -165,6 +165,13 @@
     cl::desc(
         "Use the experimental peeling code generator for software pipelining"));
 
+// Some targets may guarantee def-use ordering in same cycle for scheduling.
+// This flag is used to allow such cases. By default, it is set to false,
+// while it will be set to true by the targets.
+cl::opt<bool> AllowDefUseInSameCycle(
+    "allow-def-use-in-same-cycle", cl::init(false), cl::Hidden,
+    cl::desc("Allow def-use to be scheduled in same cycle"));
+
 namespace llvm {
 
 // A command line option to enable the CopyToPhi DAG mutation.
@@ -2788,7 +2795,10 @@
         if (Register::isPhysicalRegister(SI.getReg())) {
           if (stageScheduled(SI.getSUnit()) != StageDef)
             return false;
-          if (InstrToCycle[SI.getSUnit()] <= CycleDef)
+          if (InstrToCycle[SI.getSUnit()] < CycleDef)
+            return false;
+          if (!AllowDefUseInSameCycle &&
+              (InstrToCycle[SI.getSUnit()] == CycleDef))
             return false;
         }
   }


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