[llvm] 7820a30 - [AMDGPU] Use llvm::any_of (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 16 09:19:22 PDT 2022
Author: Kazu Hirata
Date: 2022-10-16T09:19:09-07:00
New Revision: 7820a30a1b4c985c252b7f638ae8a170d11ef98f
URL: https://github.com/llvm/llvm-project/commit/7820a30a1b4c985c252b7f638ae8a170d11ef98f
DIFF: https://github.com/llvm/llvm-project/commit/7820a30a1b4c985c252b7f638ae8a170d11ef98f.diff
LOG: [AMDGPU] Use llvm::any_of (NFC)
Added:
Modified:
llvm/lib/Target/AMDGPU/SIPostRABundler.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/SIPostRABundler.cpp b/llvm/lib/Target/AMDGPU/SIPostRABundler.cpp
index afa857c419f43..8553a0ab2a685 100644
--- a/llvm/lib/Target/AMDGPU/SIPostRABundler.cpp
+++ b/llvm/lib/Target/AMDGPU/SIPostRABundler.cpp
@@ -131,12 +131,10 @@ bool SIPostRABundler::runOnMachineFunction(MachineFunction &MF) {
bool Changed = false;
for (MachineBasicBlock &MBB : MF) {
- bool HasIGLPInstrs =
- std::any_of(MBB.instr_begin(), MBB.instr_end(), [](MachineInstr &MI) {
- unsigned Opc = MI.getOpcode();
- return (Opc == AMDGPU::SCHED_GROUP_BARRIER ||
- Opc == AMDGPU::IGLP_OPT);
- });
+ bool HasIGLPInstrs = llvm::any_of(MBB.instrs(), [](MachineInstr &MI) {
+ unsigned Opc = MI.getOpcode();
+ return Opc == AMDGPU::SCHED_GROUP_BARRIER || Opc == AMDGPU::IGLP_OPT;
+ });
// Don't cluster with IGLP instructions.
if (HasIGLPInstrs)
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