[PATCH] D130953: [X86] Eliminate redundant movzbl instruction.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

we've lost some checks, probably due to the shared check-prefixes not working anymore



================
Comment at: llvm/test/CodeGen/X86/load-scalar-as-vector.ll:5
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx        | FileCheck %s --check-prefix=AVX
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2       | FileCheck %s --check-prefix=AVX
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512dq,+avx512bw | FileCheck %s --check-prefix=AVX
----------------
I think you need to splt the AVX into:
```
--check-prefixes=AVX,AVX1
--check-prefixes=AVX,AVX2
```


================
Comment at: llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.ll:6
 ; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X64-SSE
 ; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X64-AVX,AVX1
 ; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X64-AVX,AVX512
----------------
you may need to add X86-AVX1 (and X64-AVX512 below)


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D130953/new/

https://reviews.llvm.org/D130953