[PATCH] D118298: [Spill2Reg][1/9] Initial commit. This is boilerplate code.

[Yimin Li via Phabricator via llvm-commits]

yiminli added a comment.

Should this patch set optimize out spill/reload in function "test" of F24934947: test.cpp <https://reviews.llvm.org/F24934947>?

I tried:
llvm-project/build/bin/clang -S -emit-llvm test.cpp -march=skylake-avx512 -O2
llvm-project/build/bin/llc \
	-enable-spill2reg -simplify-mir -spill2reg-mem-instrs=0 -spill2reg-vec-instrs=99999 \
	-march x86 -mattr=+avx2 -filetype=asm --x86-asm-syntax=intel test.ll

and got:
_Z4testPfS_S_:                          # @_Z4testPfS_S_

  .cfi_startproc

%bb.0:                                # %entry
==============================================

  sub     esp, 140
  .cfi_def_cfa_offset 144
  mov     eax, dword ptr [esp + 152]
  mov     ecx, dword ptr [esp + 144]
  vmovaps zmm0, zmmword ptr [ecx]
  vmovups zmmword ptr [esp + 64], zmm0    # 64-byte Spill
  mov     ecx, dword ptr [esp + 148]
  vmovaps zmm1, zmmword ptr [ecx]
  vaddps  zmm0, zmm0, zmm1
  vaddps  zmm1, zmm1, zmmword ptr [eax]
  vmovups zmmword ptr [esp], zmm1         # 64-byte Spill
  call    _Z12print_m512_fDv16_f
  vmovups zmm0, zmmword ptr [esp]         # 64-byte Reload
  call    _Z12print_m512_fDv16_f
  vmovups zmm0, zmmword ptr [esp + 64]    # 64-byte Reload
  add     esp, 140
  .cfi_def_cfa_offset 4
  ret

Did I miss anything? Thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118298/new/

https://reviews.llvm.org/D118298