[PATCH] D46498: [X86] Enable reciprocal estimates for v16f32 vectors by using VRCP14PS/VRSQRT14PS
LuoYuanke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 15 18:10:33 PDT 2022
LuoYuanke added inline comments.
================
Comment at: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp:17823
+ // There is no FSQRT for 512-bits, but there is RSQRT14.
+ unsigned Opcode = VT == MVT::v16f32 ? X86ISD::RSQRT14 : X86ISD::FRSQRT;
+ return DAG.getNode(Opcode, SDLoc(Op), VT, Op);
----------------
craig.topper wrote:
> LuoYuanke wrote:
> > @craig.topper, for v4f32 and v8f32, if avx512f is available, do we prefer RSQRT14 or FRSQRT?
> FRSQRT is a shorter encoding but the result would probably be more accurate with RSQRT14. Not sure what’s best.
Got it. Thanks, Craig.
Repository:
rL LLVM
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https://reviews.llvm.org/D46498/new/
https://reviews.llvm.org/D46498
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