[llvm] 0b36d1e - [Mips] Regenerate unalignedload.ll
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 15 10:30:18 PDT 2022
Author: Simon Pilgrim
Date: 2022-10-15T18:29:54+01:00
New Revision: 0b36d1ef1f554ac115c7159b0311455c0d9d5569
URL: https://github.com/llvm/llvm-project/commit/0b36d1ef1f554ac115c7159b0311455c0d9d5569
DIFF: https://github.com/llvm/llvm-project/commit/0b36d1ef1f554ac115c7159b0311455c0d9d5569.diff
LOG: [Mips] Regenerate unalignedload.ll
Added:
Modified:
llvm/test/CodeGen/Mips/unalignedload.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/Mips/unalignedload.ll b/llvm/test/CodeGen/Mips/unalignedload.ll
index 14a94313c1ce..a6f0a8ae0e63 100644
--- a/llvm/test/CodeGen/Mips/unalignedload.ll
+++ b/llvm/test/CodeGen/Mips/unalignedload.ll
@@ -1,9 +1,11 @@
-; RUN: llc < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,MIPS32-EL
-; RUN: llc < %s -march=mips -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,MIPS32-EB
-; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,MIPS32-EL
-; RUN: llc < %s -march=mips -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,MIPS32-EB
-; RUN: llc < %s -march=mipsel -mcpu=mips32r6 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,MIPS32R6-EL
-; RUN: llc < %s -march=mips -mcpu=mips32r6 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,MIPS32R6-EB
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=MIPS32-EL
+; RUN: llc < %s -march=mips -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=MIPS32-EB
+; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=MIPS32-EL
+; RUN: llc < %s -march=mips -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=MIPS32-EB
+; RUN: llc < %s -march=mipsel -mcpu=mips32r6 -relocation-model=pic | FileCheck %s -check-prefixes=MIPS32R6-EL
+; RUN: llc < %s -march=mips -mcpu=mips32r6 -relocation-model=pic | FileCheck %s -check-prefixes=MIPS32R6-EB
+
%struct.S2 = type { %struct.S1, %struct.S1 }
%struct.S1 = type { i8, i8 }
%struct.S4 = type { [7 x i8] }
@@ -12,74 +14,185 @@
@s4 = common global %struct.S4 zeroinitializer, align 1
define void @bar1() nounwind {
+; MIPS32-EL-LABEL: bar1:
+; MIPS32-EL: # %bb.0: # %entry
+; MIPS32-EL-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-EL-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-EL-NEXT: addiu $sp, $sp, -24
+; MIPS32-EL-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-EL-NEXT: addu $gp, $2, $25
+; MIPS32-EL-NEXT: lw $1, %got(s2)($gp)
+; MIPS32-EL-NEXT: lbu $2, 2($1)
+; MIPS32-EL-NEXT: lbu $1, 3($1)
+; MIPS32-EL-NEXT: sll $1, $1, 8
+; MIPS32-EL-NEXT: lw $25, %call16(foo2)($gp)
+; MIPS32-EL-NEXT: .reloc ($tmp0), R_MIPS_JALR, foo2
+; MIPS32-EL-NEXT: $tmp0:
+; MIPS32-EL-NEXT: jalr $25
+; MIPS32-EL-NEXT: or $4, $1, $2
+; MIPS32-EL-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-EL-NEXT: jr $ra
+; MIPS32-EL-NEXT: addiu $sp, $sp, 24
+;
+; MIPS32-EB-LABEL: bar1:
+; MIPS32-EB: # %bb.0: # %entry
+; MIPS32-EB-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-EB-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-EB-NEXT: addiu $sp, $sp, -24
+; MIPS32-EB-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-EB-NEXT: addu $gp, $2, $25
+; MIPS32-EB-NEXT: lw $1, %got(s2)($gp)
+; MIPS32-EB-NEXT: lbu $2, 3($1)
+; MIPS32-EB-NEXT: lbu $1, 2($1)
+; MIPS32-EB-NEXT: sll $1, $1, 8
+; MIPS32-EB-NEXT: or $1, $1, $2
+; MIPS32-EB-NEXT: lw $25, %call16(foo2)($gp)
+; MIPS32-EB-NEXT: .reloc ($tmp0), R_MIPS_JALR, foo2
+; MIPS32-EB-NEXT: $tmp0:
+; MIPS32-EB-NEXT: jalr $25
+; MIPS32-EB-NEXT: sll $4, $1, 16
+; MIPS32-EB-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-EB-NEXT: jr $ra
+; MIPS32-EB-NEXT: addiu $sp, $sp, 24
+;
+; MIPS32R6-EL-LABEL: bar1:
+; MIPS32R6-EL: # %bb.0: # %entry
+; MIPS32R6-EL-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32R6-EL-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32R6-EL-NEXT: addiu $sp, $sp, -24
+; MIPS32R6-EL-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32R6-EL-NEXT: addu $gp, $2, $25
+; MIPS32R6-EL-NEXT: lw $1, %got(s2)($gp)
+; MIPS32R6-EL-NEXT: lhu $4, 2($1)
+; MIPS32R6-EL-NEXT: lw $25, %call16(foo2)($gp)
+; MIPS32R6-EL-NEXT: .reloc ($tmp0), R_MIPS_JALR, foo2
+; MIPS32R6-EL-NEXT: $tmp0:
+; MIPS32R6-EL-NEXT: jalrc $25
+; MIPS32R6-EL-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32R6-EL-NEXT: jr $ra
+; MIPS32R6-EL-NEXT: addiu $sp, $sp, 24
+;
+; MIPS32R6-EB-LABEL: bar1:
+; MIPS32R6-EB: # %bb.0: # %entry
+; MIPS32R6-EB-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32R6-EB-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32R6-EB-NEXT: addiu $sp, $sp, -24
+; MIPS32R6-EB-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32R6-EB-NEXT: addu $gp, $2, $25
+; MIPS32R6-EB-NEXT: lw $1, %got(s2)($gp)
+; MIPS32R6-EB-NEXT: lhu $1, 2($1)
+; MIPS32R6-EB-NEXT: lw $25, %call16(foo2)($gp)
+; MIPS32R6-EB-NEXT: .reloc ($tmp0), R_MIPS_JALR, foo2
+; MIPS32R6-EB-NEXT: $tmp0:
+; MIPS32R6-EB-NEXT: jalr $25
+; MIPS32R6-EB-NEXT: sll $4, $1, 16
+; MIPS32R6-EB-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32R6-EB-NEXT: jr $ra
+; MIPS32R6-EB-NEXT: addiu $sp, $sp, 24
entry:
-; ALL-LABEL: bar1:
-
-; ALL-DAG: lw $[[R0:[0-9]+]], %got(s2)(
-
-; MIPS32-EL-DAG: lbu $[[PART1:[0-9]+]], 2($[[R0]])
-; MIPS32-EL-DAG: lbu $[[PART2:[0-9]+]], 3($[[R0]])
-; MIPS32-EL-DAG: sll $[[T0:[0-9]+]], $[[PART2]], 8
-; MIPS32-EL-DAG: or $4, $[[T0]], $[[PART1]]
-
-; MIPS32-EB-DAG: lbu $[[PART1:[0-9]+]], 2($[[R0]])
-; MIPS32-EB-DAG: lbu $[[PART2:[0-9]+]], 3($[[R0]])
-; MIPS32-EB-DAG: sll $[[T0:[0-9]+]], $[[PART1]], 8
-; MIPS32-EB-DAG: or $[[T1:[0-9]+]], $[[T0]], $[[PART2]]
-; MIPS32-EB-DAG: sll $4, $[[T1]], 16
-
-; MIPS32R6-DAG: lhu $[[PART1:[0-9]+]], 2($[[R0]])
-
tail call void @foo2(%struct.S1* byval(%struct.S1) getelementptr inbounds (%struct.S2, %struct.S2* @s2, i32 0, i32 1)) nounwind
ret void
}
+; FIXME: We should be able to do better than this using lhu
define void @bar2() nounwind {
+; MIPS32-EL-LABEL: bar2:
+; MIPS32-EL: # %bb.0: # %entry
+; MIPS32-EL-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-EL-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-EL-NEXT: addiu $sp, $sp, -24
+; MIPS32-EL-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-EL-NEXT: addu $gp, $2, $25
+; MIPS32-EL-NEXT: lw $1, %got(s4)($gp)
+; MIPS32-EL-NEXT: lwl $4, 3($1)
+; MIPS32-EL-NEXT: lwr $4, 0($1)
+; MIPS32-EL-NEXT: lbu $2, 4($1)
+; MIPS32-EL-NEXT: lbu $3, 5($1)
+; MIPS32-EL-NEXT: sll $3, $3, 8
+; MIPS32-EL-NEXT: or $2, $3, $2
+; MIPS32-EL-NEXT: lbu $1, 6($1)
+; MIPS32-EL-NEXT: sll $1, $1, 16
+; MIPS32-EL-NEXT: lw $25, %call16(foo4)($gp)
+; MIPS32-EL-NEXT: .reloc ($tmp1), R_MIPS_JALR, foo4
+; MIPS32-EL-NEXT: $tmp1:
+; MIPS32-EL-NEXT: jalr $25
+; MIPS32-EL-NEXT: or $5, $2, $1
+; MIPS32-EL-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-EL-NEXT: jr $ra
+; MIPS32-EL-NEXT: addiu $sp, $sp, 24
+;
+; MIPS32-EB-LABEL: bar2:
+; MIPS32-EB: # %bb.0: # %entry
+; MIPS32-EB-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-EB-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-EB-NEXT: addiu $sp, $sp, -24
+; MIPS32-EB-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-EB-NEXT: addu $gp, $2, $25
+; MIPS32-EB-NEXT: lw $1, %got(s4)($gp)
+; MIPS32-EB-NEXT: lwl $4, 0($1)
+; MIPS32-EB-NEXT: lwr $4, 3($1)
+; MIPS32-EB-NEXT: lbu $2, 5($1)
+; MIPS32-EB-NEXT: lbu $3, 4($1)
+; MIPS32-EB-NEXT: sll $3, $3, 8
+; MIPS32-EB-NEXT: or $2, $3, $2
+; MIPS32-EB-NEXT: sll $2, $2, 16
+; MIPS32-EB-NEXT: lbu $1, 6($1)
+; MIPS32-EB-NEXT: sll $1, $1, 8
+; MIPS32-EB-NEXT: lw $25, %call16(foo4)($gp)
+; MIPS32-EB-NEXT: .reloc ($tmp1), R_MIPS_JALR, foo4
+; MIPS32-EB-NEXT: $tmp1:
+; MIPS32-EB-NEXT: jalr $25
+; MIPS32-EB-NEXT: or $5, $2, $1
+; MIPS32-EB-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-EB-NEXT: jr $ra
+; MIPS32-EB-NEXT: addiu $sp, $sp, 24
+;
+; MIPS32R6-EL-LABEL: bar2:
+; MIPS32R6-EL: # %bb.0: # %entry
+; MIPS32R6-EL-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32R6-EL-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32R6-EL-NEXT: addiu $sp, $sp, -24
+; MIPS32R6-EL-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32R6-EL-NEXT: addu $gp, $2, $25
+; MIPS32R6-EL-NEXT: lw $1, %got(s4)($gp)
+; MIPS32R6-EL-NEXT: lhu $2, 4($1)
+; MIPS32R6-EL-NEXT: lbu $3, 6($1)
+; MIPS32R6-EL-NEXT: sll $3, $3, 16
+; MIPS32R6-EL-NEXT: lw $4, 0($1)
+; MIPS32R6-EL-NEXT: lw $25, %call16(foo4)($gp)
+; MIPS32R6-EL-NEXT: .reloc ($tmp1), R_MIPS_JALR, foo4
+; MIPS32R6-EL-NEXT: $tmp1:
+; MIPS32R6-EL-NEXT: jalr $25
+; MIPS32R6-EL-NEXT: or $5, $2, $3
+; MIPS32R6-EL-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32R6-EL-NEXT: jr $ra
+; MIPS32R6-EL-NEXT: addiu $sp, $sp, 24
+;
+; MIPS32R6-EB-LABEL: bar2:
+; MIPS32R6-EB: # %bb.0: # %entry
+; MIPS32R6-EB-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32R6-EB-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32R6-EB-NEXT: addiu $sp, $sp, -24
+; MIPS32R6-EB-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32R6-EB-NEXT: addu $gp, $2, $25
+; MIPS32R6-EB-NEXT: lw $1, %got(s4)($gp)
+; MIPS32R6-EB-NEXT: lbu $2, 6($1)
+; MIPS32R6-EB-NEXT: sll $2, $2, 8
+; MIPS32R6-EB-NEXT: lhu $3, 4($1)
+; MIPS32R6-EB-NEXT: sll $3, $3, 16
+; MIPS32R6-EB-NEXT: lw $4, 0($1)
+; MIPS32R6-EB-NEXT: lw $25, %call16(foo4)($gp)
+; MIPS32R6-EB-NEXT: .reloc ($tmp1), R_MIPS_JALR, foo4
+; MIPS32R6-EB-NEXT: $tmp1:
+; MIPS32R6-EB-NEXT: jalr $25
+; MIPS32R6-EB-NEXT: or $5, $3, $2
+; MIPS32R6-EB-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32R6-EB-NEXT: jr $ra
+; MIPS32R6-EB-NEXT: addiu $sp, $sp, 24
entry:
-; ALL-LABEL: bar2:
-
-; ALL-DAG: lw $[[R2:[0-9]+]], %got(s4)(
-
-; MIPS32-EL-DAG: lwl $[[R1:4]], 3($[[R2]])
-; MIPS32-EL-DAG: lwr $[[R1]], 0($[[R2]])
-; MIPS32-EL-DAG: lbu $[[T0:[0-9]+]], 4($[[R2]])
-; MIPS32-EL-DAG: lbu $[[T1:[0-9]+]], 5($[[R2]])
-; MIPS32-EL-DAG: lbu $[[T2:[0-9]+]], 6($[[R2]])
-; MIPS32-EL-DAG: sll $[[T3:[0-9]+]], $[[T1]], 8
-; MIPS32-EL-DAG: or $[[T4:[0-9]+]], $[[T3]], $[[T0]]
-; MIPS32-EL-DAG: sll $[[T5:[0-9]+]], $[[T2]], 16
-; MIPS32-EL-DAG: or $5, $[[T4]], $[[T5]]
-
-; MIPS32-EB-DAG: lwl $[[R1:4]], 0($[[R2]])
-; MIPS32-EB-DAG: lwr $[[R1]], 3($[[R2]])
-; MIPS32-EB-DAG: lbu $[[T0:[0-9]+]], 4($[[R2]])
-; MIPS32-EB-DAG: lbu $[[T1:[0-9]+]], 5($[[R2]])
-; MIPS32-EB-DAG: lbu $[[T2:[0-9]+]], 6($[[R2]])
-; MIPS32-EB-DAG: sll $[[T3:[0-9]+]], $[[T0]], 8
-; MIPS32-EB-DAG: or $[[T4:[0-9]+]], $[[T3]], $[[T1]]
-; MIPS32-EB-DAG: sll $[[T5:[0-9]+]], $[[T4]], 16
-; MIPS32-EB-DAG: sll $[[T6:[0-9]+]], $[[T2]], 8
-; MIPS32-EB-DAG: or $5, $[[T5]], $[[T6]]
-
-; FIXME: We should be able to do better than this using lhu
-; MIPS32R6-EL-DAG: lw $4, 0($[[R2]])
-; MIPS32R6-EL-DAG: lhu $[[T0:[0-9]+]], 4($[[R2]])
-; MIPS32R6-EL-DAG: lbu $[[T1:[0-9]+]], 6($[[R2]])
-; MIPS32R6-EL-DAG: sll $[[T2:[0-9]+]], $[[T1]], 16
-; MIPS32R6-EL-DAG: or $5, $[[T0]], $[[T2]]
-
-; FIXME: We should be able to do better than this using lhu
-; MIPS32R6-EB-DAG: lw $4, 0($[[R2]])
-; MIPS32R6-EB-DAG: lhu $[[T0:[0-9]+]], 4($[[R2]])
-; MIPS32R6-EB-DAG: lbu $[[T1:[0-9]+]], 6($[[R2]])
-; MIPS32R6-EB-DAG: sll $[[T2:[0-9]+]], $[[T0]], 16
-; MIPS32R6-EB-DAG: sll $[[T3:[0-9]+]], $[[T1]], 8
-; MIPS32R6-EB-DAG: or $5, $[[T2]], $[[T3]]
-
tail call void @foo4(%struct.S4* byval(%struct.S4) @s4) nounwind
ret void
}
declare void @foo2(%struct.S1* byval(%struct.S1))
-
declare void @foo4(%struct.S4* byval(%struct.S4))
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