[PATCH] D135455: [AArch64] SME2 Single-multi vector ternary int/FP 2 and 4 registers

[Amara Emerson via Phabricator via llvm-commits]

aemerson added a subscriber: c-rhodes.
aemerson added a comment.

The GISel test changes are fine but maybe someone should look into the STP test changes.



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Comment at: llvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir:367-371
+# CHECK-NEXT:    renamable $x9, renamable $x8 = LDPXi renamable $x0, 1 :: (load (s64))
+# CHECK-NEXT:    STRXui killed renamable $x9, renamable $x0, 11 :: (store (s64), align 4)
 # CHECK-NEXT:    renamable $x9 = LDRXui renamable $x0, 3 :: (load (s64))
 # CHECK-NEXT:    renamable $x14 = LDRXui renamable $x0, 5 :: (load (s64))
+# CHECK-NEXT:    STRXui renamable $x9, renamable $x0, 10 :: (store (s64), align 4)
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The STP optimization isn't firing any more, this might be a problem with either the test or the optimization itself. IIRC @c-rhodes has looked into this before.


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  https://reviews.llvm.org/D135455/new/

https://reviews.llvm.org/D135455