[PATCH] D135895: [RISCV] Limit alignment of stack temporary used for indirect passing of scalable vectors.

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added a comment.

Does anything in the callee expect/rely on the alignment? I'm wondering if it's possible that a caller with one subtarget uses a lower alignment than its callee with another subtarget, causing issues.


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  https://reviews.llvm.org/D135895/new/

https://reviews.llvm.org/D135895