[llvm] 07c5270 - [AArch64] add tests for ccmp with negative constant op1; NFC

via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 13 21:07:59 PDT 2022


Author: chenglin.bi
Date: 2022-10-14T12:07:43+08:00
New Revision: 07c52700432ed595a00b186c39fea7aaaaf06d42

URL: https://github.com/llvm/llvm-project/commit/07c52700432ed595a00b186c39fea7aaaaf06d42
DIFF: https://github.com/llvm/llvm-project/commit/07c52700432ed595a00b186c39fea7aaaaf06d42.diff

LOG: [AArch64] add tests for ccmp with negative constant op1; NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/arm64-ccmp.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/arm64-ccmp.ll b/llvm/test/CodeGen/AArch64/arm64-ccmp.ll
index af447a731152f..b97bc0e971b6c 100644
--- a/llvm/test/CodeGen/AArch64/arm64-ccmp.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-ccmp.ll
@@ -1194,4 +1194,53 @@ entry:
 }
 declare i32 @callee(i32)
 
+; FIXME: mov w8, #-2 + ccmp w1, w8, #0, eq
+;    --> ccmn w1, #2, #0, eq
+define i1 @cmp_and_negative_const(i32 %0, i32 %1) {
+; SDISEL-LABEL: cmp_and_negative_const:
+; SDISEL:       ; %bb.0:
+; SDISEL-NEXT:    cmn w0, #1
+; SDISEL-NEXT:    mov w8, #-2
+; SDISEL-NEXT:    ccmp w1, w8, #0, eq
+; SDISEL-NEXT:    cset w0, eq
+; SDISEL-NEXT:    ret
+;
+; GISEL-LABEL: cmp_and_negative_const:
+; GISEL:       ; %bb.0:
+; GISEL-NEXT:    cmn w0, #1
+; GISEL-NEXT:    cset w8, eq
+; GISEL-NEXT:    cmn w1, #2
+; GISEL-NEXT:    cset w9, eq
+; GISEL-NEXT:    and w0, w8, w9
+; GISEL-NEXT:    ret
+  %3 = icmp eq i32 %0, -1
+  %4 = icmp eq i32 %1, -2
+  %5 = and i1 %3, %4
+  ret i1 %5
+}
+
+; FIXME: mov w8, #-2 + ccmp w1, w8, #4, ne
+;    --> ccmn w1, #2, #4, ne
+define i1 @cmp_or_negative_const(i32 %a, i32 %b) {
+; SDISEL-LABEL: cmp_or_negative_const:
+; SDISEL:       ; %bb.0:
+; SDISEL-NEXT:    cmn w0, #1
+; SDISEL-NEXT:    mov w8, #-2
+; SDISEL-NEXT:    ccmp w1, w8, #4, ne
+; SDISEL-NEXT:    cset w0, eq
+; SDISEL-NEXT:    ret
+;
+; GISEL-LABEL: cmp_or_negative_const:
+; GISEL:       ; %bb.0:
+; GISEL-NEXT:    cmn w0, #1
+; GISEL-NEXT:    cset w8, eq
+; GISEL-NEXT:    cmn w1, #2
+; GISEL-NEXT:    cset w9, eq
+; GISEL-NEXT:    orr w0, w8, w9
+; GISEL-NEXT:    ret
+  %cmp = icmp eq i32 %a, -1
+  %cmp1 = icmp eq i32 %b, -2
+  %or.cond = or i1 %cmp, %cmp1
+  ret i1 %or.cond
+}
 attributes #0 = { nounwind }


        


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