[PATCH] D135934: Add MSRLIST instructions.
Freddy, Ye via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 13 20:04:26 PDT 2022
FreddyYe created this revision.
Herald added subscribers: pengfei, hiraditya.
Herald added a project: All.
FreddyYe requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D135934
Files:
llvm/docs/ReleaseNotes.rst
llvm/lib/Target/X86/X86InstrSystem.td
llvm/test/MC/Disassembler/X86/x86-64-rdmsrlist_wrmsrlist.txt
llvm/test/MC/X86/x86-64-rdmsrlist_wrmsrlist.s
Index: llvm/test/MC/X86/x86-64-rdmsrlist_wrmsrlist.s
===================================================================
--- /dev/null
+++ llvm/test/MC/X86/x86-64-rdmsrlist_wrmsrlist.s
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: rdmsrlist
+// CHECK: encoding: [0xf2,0x0f,0x01,0xc6]
+ rdmsrlist
+
+// CHECK: wrmsrlist
+// CHECK: encoding: [0xf3,0x0f,0x01,0xc6]
+ wrmsrlist
Index: llvm/test/MC/Disassembler/X86/x86-64-rdmsrlist_wrmsrlist.txt
===================================================================
--- /dev/null
+++ llvm/test/MC/Disassembler/X86/x86-64-rdmsrlist_wrmsrlist.txt
@@ -0,0 +1,10 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT: rdmsrlist
+# INTEL: rdmsrlist
+0xf2,0x0f,0x01,0xc6
+
+# ATT: wrmsrlist
+# INTEL: wrmsrlist
+0xf3,0x0f,0x01,0xc6
Index: llvm/lib/Target/X86/X86InstrSystem.td
===================================================================
--- llvm/lib/Target/X86/X86InstrSystem.td
+++ llvm/lib/Target/X86/X86InstrSystem.td
@@ -428,6 +428,11 @@
let Defs = [EAX, EDX], Uses = [ECX] in
def RDMSR : I<0x32, RawFrm, (outs), (ins), "rdmsr", []>, TB;
+let Uses = [RSI, RDI, RCX], Predicates = [In64BitMode] in
+def WRMSRNLIST : I<0x01, MRM_C6, (outs), (ins), "wrmsrlist", []>, XS;
+let Uses = [RSI, RDI, RCX], Predicates = [In64BitMode] in
+def RDMSRNLIST : I<0x01, MRM_C6, (outs), (ins), "rdmsrlist", []>, XD;
+
let Defs = [RAX, RDX], Uses = [ECX] in
def RDPMC : I<0x33, RawFrm, (outs), (ins), "rdpmc", []>, TB;
Index: llvm/docs/ReleaseNotes.rst
===================================================================
--- llvm/docs/ReleaseNotes.rst
+++ llvm/docs/ReleaseNotes.rst
@@ -131,6 +131,8 @@
Changes to the X86 Backend
--------------------------
+- Support ISA of ``MSRLIST``.
+
Changes to the OCaml bindings
-----------------------------
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