[PATCH] D135875: [ARM] Add additional targets to divide tests.

[Keith Walker via Phabricator via llvm-commits]

keith.walker.arm created this revision.
keith.walker.arm added reviewers: craig.topper, efriedma, RKSimon, nickdesaulniers.
Herald added subscribers: StephenFan, kristof.beyls.
Herald added a project: All.
keith.walker.arm requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

The main motivation to these additional targets is for covering the
differences in the instructions available between Thumb2 and Thumb1.


https://reviews.llvm.org/D135875

Files:
  llvm/test/CodeGen/ARM/div.ll


Index: llvm/test/CodeGen/ARM/div.ll
===================================================================
--- llvm/test/CodeGen/ARM/div.ll
+++ llvm/test/CodeGen/ARM/div.ll
@@ -1,15 +1,28 @@
 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a8    | \
 ; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-SWDIV
 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=swift        | \
-; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV
+; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV \
+; RUN:                  -check-prefix=CHECK-HWDIV-T2
 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r4    | \
 ; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-SWDIV
 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r4f   | \
 ; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-SWDIV
 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r5    | \
-; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV
+; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV \
+; RUN:                  -check-prefix=CHECK-HWDIV-T2
 ; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8    | \
 ; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=armv7 -mcpu=cortex-a7    | \
+; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV \
+; RUN:                  -check-prefix=CHECK-HWDIV-T2
+; RUN: llc < %s -mtriple=armv7 -mcpu=cortex-a7 -march=thumb | \
+; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV \
+; RUN:                  -check-prefix=CHECK-THUMB \
+; RUN:                  -check-prefix=CHECK-HWDIV-T2
+; RUN: llc < %s -mtriple=thumbv8m.base -mcpu=cortex-m23 | \
+; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV \
+; RUN:                  -check-prefix=CHECK-THUMB \
+; RUN:                  -check-prefix=CHECK-HWDIV-T1
 ; RUN: llc < %s -mtriple=armv7ve-none-linux-gnu           | \
 ; RUN:     FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV
 ; RUN: llc < %s -mtriple=thumbv7ve-none-linux-gnu         | \
@@ -49,7 +62,9 @@
 
 ; CHECK-THUMB: .thumb_func
 ; CHECK-HWDIV: sdiv
-; CHECK-HWDIV: mls
+; CHECK-HWDIV-T2-NEXT: mls
+; CHECK-HWDIV-T1-NEXT: muls
+; CHECK-HWDIV-T1-NEXT: subs
 
 ; EABI MODE = Remainder in R1, quotient in R0
 ; CHECK-EABI: __aeabi_idivmod
@@ -65,7 +80,9 @@
 
 ; CHECK-THUMB: .thumb_func
 ; CHECK-HWDIV: udiv
-; CHECK-HWDIV: mls
+; CHECK-HWDIV-T2-NEXT: mls
+; CHECK-HWDIV-T1-NEXT: muls
+; CHECK-HWDIV-T1-NEXT: subs
 
 ; EABI MODE = Remainder in R1, quotient in R0
 ; CHECK-EABI: __aeabi_uidivmod
@@ -107,30 +124,30 @@
 
 ; Make sure we avoid a libcall for some constants.
 define i64 @f7(i64 %a) {
-; CHECK-SWDIV-LABEL: f7
+; CHECK-LABEL: f7
 ; CHECK-SWDIV: adc
 ; CHECK-SWDIV: umull
-; CHECK-HWDIV-LABEL: f7
-; CHECK-HWDIV: adc
-; CHECK-HWDIV: umull
-; CHECK-EABI-LABEL: f7
+; CHECK-HWDIV-T2: adc
+; CHECK-HWDIV-T2: umull
 ; CHECK-EABI: adc
 ; CHECK-EABI: umull
+; No 32-bit => 64-bit HW multiply instruction
+; CHECK-HWDIV-T1: __umoddi3
   %tmp1 = urem i64 %a, 3
   ret i64 %tmp1
 }
 
 ; Make sure we avoid a libcall for some constants.
 define i64 @f8(i64 %a) {
-; CHECK-SWDIV-LABEL: f8
+; CHECK-LABEL: f8
 ; CHECK-SWDIV: adc
 ; CHECK-SWDIV: umull
-; CHECK-HWDIV-LABEL: f8
-; CHECK-HWDIV: adc
-; CHECK-HWDIV: umull
-; CHECK-EABI-LABEL: f8
+; CHECK-HWDIV-T2: adc
+; CHECK-HWDIV-T2: umull
 ; CHECK-EABI: adc
 ; CHECK-EABI: umull
+; No 32-bit => 64-bit HW multiply instruction
+; CHECK-HWDIV-T1: __udivdi3
   %tmp1 = udiv i64 %a, 3
   ret i64 %tmp1
 }


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