[PATCH] D135641: [LoongArch] Add earlyclobber of destination register to atomic instructions

Wed Oct 12 07:02:14 PDT 2022

xry111 added a comment.

In D135641#3848627 <https://reviews.llvm.org/D135641#3848627>, @xen0n wrote:

> In D135641#3848541 <https://reviews.llvm.org/D135641#3848541>, @xry111 wrote:
>
>> Why didn't we notice this before? :(
>
> Of course it's because RISCV AMO doesn't have this implementation feature/detail/quirk/wart (pick one suitable for you) ;-)

I mean I had spent some time to find a way for describing our "feature" (or whatever) last year, and found "earlyclobber": https://github.com/xry111/llvm-project/blob/d4c6b92/llvm/lib/Target/LoongArch/LoongArchInstrInfoA.td#L42

So basically "why didn't **I** notice it before" :(.

Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D135641/new/

https://reviews.llvm.org/D135641