[llvm] ec2640b - [LoongArch] Handle missing CondCodes
Weining Lu via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 12 06:28:22 PDT 2022
Author: gonglingqin
Date: 2022-10-12T21:26:57+08:00
New Revision: ec2640bf3a5221a3ac58f25b34976be6264e8e21
URL: https://github.com/llvm/llvm-project/commit/ec2640bf3a5221a3ac58f25b34976be6264e8e21
DIFF: https://github.com/llvm/llvm-project/commit/ec2640bf3a5221a3ac58f25b34976be6264e8e21.diff
LOG: [LoongArch] Handle missing CondCodes
Support SETLE/SETEQ and expand SETGE/SETNE/SETGT
Differential Revision: https://reviews.llvm.org/D135511
Added:
Modified:
llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
llvm/test/CodeGen/LoongArch/ir-instruction/fcmp-dbl.ll
llvm/test/CodeGen/LoongArch/ir-instruction/fcmp-flt.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
index 9a901593c523c..0e2f57551f334 100644
--- a/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
@@ -160,10 +160,13 @@ def : Pat<(fcanonicalize FPR32:$fj), (FMAX_S $fj, $fj)>;
class PatFPSetcc<CondCode cc, LAInst CmpInst, RegisterClass RegTy>
: Pat<(any_fsetcc RegTy:$fj, RegTy:$fk, cc),
(MOVCF2GR (CmpInst RegTy:$fj, RegTy:$fk))>;
-// SETOGT/SETOGE/SETUGT/SETUGE will expand into SETOLT/SETOLE/SETULT/SETULE.
+// SETOGT/SETOGE/SETUGT/SETUGE/SETGE/SETNE/SETGT will expand into
+// SETOLT/SETOLE/SETULT/SETULE/SETLE/SETEQ/SETLT.
def : PatFPSetcc<SETOEQ, FCMP_CEQ_S, FPR32>;
+def : PatFPSetcc<SETEQ, FCMP_CEQ_S, FPR32>;
def : PatFPSetcc<SETOLT, FCMP_CLT_S, FPR32>;
def : PatFPSetcc<SETOLE, FCMP_CLE_S, FPR32>;
+def : PatFPSetcc<SETLE, FCMP_CLE_S, FPR32>;
def : PatFPSetcc<SETONE, FCMP_CNE_S, FPR32>;
def : PatFPSetcc<SETO, FCMP_COR_S, FPR32>;
def : PatFPSetcc<SETUEQ, FCMP_CUEQ_S, FPR32>;
diff --git a/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
index 9fb9b99d32f3a..d061b6426e244 100644
--- a/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
@@ -168,10 +168,13 @@ def : Pat<(fcanonicalize FPR64:$fj), (FMAX_D $fj, $fj)>;
// Match non-signaling comparison
-// SETOGT/SETOGE/SETUGT/SETUGE will expand into SETOLT/SETOLE/SETULT/SETULE.
+// SETOGT/SETOGE/SETUGT/SETUGE/SETGE/SETNE/SETGT will expand into
+// SETOLT/SETOLE/SETULT/SETULE/SETLE/SETEQ/SETLT.
def : PatFPSetcc<SETOEQ, FCMP_CEQ_D, FPR64>;
+def : PatFPSetcc<SETEQ, FCMP_CEQ_D, FPR64>;
def : PatFPSetcc<SETOLT, FCMP_CLT_D, FPR64>;
def : PatFPSetcc<SETOLE, FCMP_CLE_D, FPR64>;
+def : PatFPSetcc<SETLE, FCMP_CLE_D, FPR64>;
def : PatFPSetcc<SETONE, FCMP_CNE_D, FPR64>;
def : PatFPSetcc<SETO, FCMP_COR_D, FPR64>;
def : PatFPSetcc<SETUEQ, FCMP_CUEQ_D, FPR64>;
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 91d58b28250da..f23de55b5aec2 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -111,8 +111,9 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::BITREVERSE, MVT::i32, Legal);
}
- static const ISD::CondCode FPCCToExpand[] = {ISD::SETOGT, ISD::SETOGE,
- ISD::SETUGT, ISD::SETUGE};
+ static const ISD::CondCode FPCCToExpand[] = {
+ ISD::SETOGT, ISD::SETOGE, ISD::SETUGT, ISD::SETUGE,
+ ISD::SETGE, ISD::SETNE, ISD::SETGT};
if (Subtarget.hasBasicF()) {
setCondCodeAction(FPCCToExpand, MVT::f32, Expand);
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/fcmp-dbl.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/fcmp-dbl.ll
index 9743dca47580b..14fdf82319321 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/fcmp-dbl.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/fcmp-dbl.ll
@@ -256,3 +256,120 @@ define i1 @fcmp_true(double %a, double %b) {
%cmp = fcmp true double %a, %b
ret i1 %cmp
}
+
+define i1 @fcmp_fast_olt(double %a, double %b, i1 %c) nounwind {
+; LA32-LABEL: fcmp_fast_olt:
+; LA32: # %bb.0:
+; LA32-NEXT: movgr2fr.w $fa1, $zero
+; LA32-NEXT: movgr2frh.w $fa1, $zero
+; LA32-NEXT: fcmp.cle.d $fcc0, $fa1, $fa0
+; LA32-NEXT: movcf2gr $a1, $fcc0
+; LA32-NEXT: bnez $a1, .LBB16_2
+; LA32-NEXT: # %bb.1: # %if.then
+; LA32-NEXT: ret
+; LA32-NEXT: .LBB16_2: # %if.else
+; LA32-NEXT: movgr2fr.w $fa1, $zero
+; LA32-NEXT: movgr2frh.w $fa1, $zero
+; LA32-NEXT: fcmp.clt.d $fcc0, $fa0, $fa1
+; LA32-NEXT: movcf2gr $a0, $fcc0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: fcmp_fast_olt:
+; LA64: # %bb.0:
+; LA64-NEXT: movgr2fr.d $fa1, $zero
+; LA64-NEXT: fcmp.cle.d $fcc0, $fa1, $fa0
+; LA64-NEXT: movcf2gr $a1, $fcc0
+; LA64-NEXT: bnez $a1, .LBB16_2
+; LA64-NEXT: # %bb.1: # %if.then
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB16_2: # %if.else
+; LA64-NEXT: fcmp.clt.d $fcc0, $fa0, $fa1
+; LA64-NEXT: movcf2gr $a0, $fcc0
+; LA64-NEXT: ret
+ %cmp = fcmp fast olt double %a, 0.000000e+00
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+ ret i1 %c
+
+if.else:
+ ret i1 %cmp
+}
+
+define i1 @fcmp_fast_oeq(double %a, double %b, i1 %c) nounwind {
+; LA32-LABEL: fcmp_fast_oeq:
+; LA32: # %bb.0:
+; LA32-NEXT: movgr2fr.w $fa1, $zero
+; LA32-NEXT: movgr2frh.w $fa1, $zero
+; LA32-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1
+; LA32-NEXT: movcf2gr $a1, $fcc0
+; LA32-NEXT: xori $a1, $a1, 1
+; LA32-NEXT: bnez $a1, .LBB17_2
+; LA32-NEXT: # %bb.1: # %if.then
+; LA32-NEXT: ret
+; LA32-NEXT: .LBB17_2: # %if.else
+; LA32-NEXT: movgr2fr.w $fa1, $zero
+; LA32-NEXT: movgr2frh.w $fa1, $zero
+; LA32-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1
+; LA32-NEXT: movcf2gr $a0, $fcc0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: fcmp_fast_oeq:
+; LA64: # %bb.0:
+; LA64-NEXT: movgr2fr.d $fa1, $zero
+; LA64-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1
+; LA64-NEXT: movcf2gr $a1, $fcc0
+; LA64-NEXT: xori $a1, $a1, 1
+; LA64-NEXT: bnez $a1, .LBB17_2
+; LA64-NEXT: # %bb.1: # %if.then
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB17_2: # %if.else
+; LA64-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1
+; LA64-NEXT: movcf2gr $a0, $fcc0
+; LA64-NEXT: ret
+ %cmp = fcmp fast oeq double %a, 0.000000e+00
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+ ret i1 %c
+
+if.else:
+ ret i1 %cmp
+}
+
+define i1 @fcmp_fast_ole(double %a, double %b, i1 %c) nounwind {
+; LA32-LABEL: fcmp_fast_ole:
+; LA32: # %bb.0:
+; LA32-NEXT: movgr2fr.w $fa1, $zero
+; LA32-NEXT: movgr2frh.w $fa1, $zero
+; LA32-NEXT: fcmp.clt.d $fcc0, $fa1, $fa0
+; LA32-NEXT: bcnez $fcc0, .LBB18_2
+; LA32-NEXT: # %bb.1: # %if.then
+; LA32-NEXT: ret
+; LA32-NEXT: .LBB18_2: # %if.else
+; LA32-NEXT: movgr2fr.w $fa1, $zero
+; LA32-NEXT: movgr2frh.w $fa1, $zero
+; LA32-NEXT: fcmp.cle.d $fcc0, $fa0, $fa1
+; LA32-NEXT: movcf2gr $a0, $fcc0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: fcmp_fast_ole:
+; LA64: # %bb.0:
+; LA64-NEXT: movgr2fr.d $fa1, $zero
+; LA64-NEXT: fcmp.clt.d $fcc0, $fa1, $fa0
+; LA64-NEXT: bcnez $fcc0, .LBB18_2
+; LA64-NEXT: # %bb.1: # %if.then
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB18_2: # %if.else
+; LA64-NEXT: fcmp.cle.d $fcc0, $fa0, $fa1
+; LA64-NEXT: movcf2gr $a0, $fcc0
+; LA64-NEXT: ret
+ %cmp = fcmp fast ole double %a, 0.000000e+00
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+ ret i1 %c
+
+if.else:
+ ret i1 %cmp
+}
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/fcmp-flt.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/fcmp-flt.ll
index 01c8b860291e8..30803e6197919 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/fcmp-flt.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/fcmp-flt.ll
@@ -256,3 +256,111 @@ define i1 @fcmp_true(float %a, float %b) {
%cmp = fcmp true float %a, %b
ret i1 %cmp
}
+
+define i1 @fcmp_fast_olt(float %a, float %b, i1 %c) nounwind {
+; LA32-LABEL: fcmp_fast_olt:
+; LA32: # %bb.0:
+; LA32-NEXT: movgr2fr.w $fa1, $zero
+; LA32-NEXT: fcmp.cle.s $fcc0, $fa1, $fa0
+; LA32-NEXT: movcf2gr $a1, $fcc0
+; LA32-NEXT: bnez $a1, .LBB16_2
+; LA32-NEXT: # %bb.1: # %if.then
+; LA32-NEXT: ret
+; LA32-NEXT: .LBB16_2: # %if.else
+; LA32-NEXT: fcmp.clt.s $fcc0, $fa0, $fa1
+; LA32-NEXT: movcf2gr $a0, $fcc0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: fcmp_fast_olt:
+; LA64: # %bb.0:
+; LA64-NEXT: movgr2fr.w $fa1, $zero
+; LA64-NEXT: fcmp.cle.s $fcc0, $fa1, $fa0
+; LA64-NEXT: movcf2gr $a1, $fcc0
+; LA64-NEXT: bnez $a1, .LBB16_2
+; LA64-NEXT: # %bb.1: # %if.then
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB16_2: # %if.else
+; LA64-NEXT: fcmp.clt.s $fcc0, $fa0, $fa1
+; LA64-NEXT: movcf2gr $a0, $fcc0
+; LA64-NEXT: ret
+ %cmp = fcmp fast olt float %a, 0.000000e+00
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+ ret i1 %c
+
+if.else:
+ ret i1 %cmp
+}
+
+define i1 @fcmp_fast_oeq(float %a, float %b, i1 %c) nounwind {
+; LA32-LABEL: fcmp_fast_oeq:
+; LA32: # %bb.0:
+; LA32-NEXT: movgr2fr.w $fa1, $zero
+; LA32-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1
+; LA32-NEXT: movcf2gr $a1, $fcc0
+; LA32-NEXT: xori $a1, $a1, 1
+; LA32-NEXT: bnez $a1, .LBB17_2
+; LA32-NEXT: # %bb.1: # %if.then
+; LA32-NEXT: ret
+; LA32-NEXT: .LBB17_2: # %if.else
+; LA32-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1
+; LA32-NEXT: movcf2gr $a0, $fcc0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: fcmp_fast_oeq:
+; LA64: # %bb.0:
+; LA64-NEXT: movgr2fr.w $fa1, $zero
+; LA64-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1
+; LA64-NEXT: movcf2gr $a1, $fcc0
+; LA64-NEXT: xori $a1, $a1, 1
+; LA64-NEXT: bnez $a1, .LBB17_2
+; LA64-NEXT: # %bb.1: # %if.then
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB17_2: # %if.else
+; LA64-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1
+; LA64-NEXT: movcf2gr $a0, $fcc0
+; LA64-NEXT: ret
+ %cmp = fcmp fast oeq float %a, 0.000000e+00
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+ ret i1 %c
+
+if.else:
+ ret i1 %cmp
+}
+
+define i1 @fcmp_fast_ole(float %a, float %b, i1 %c) nounwind {
+; LA32-LABEL: fcmp_fast_ole:
+; LA32: # %bb.0:
+; LA32-NEXT: movgr2fr.w $fa1, $zero
+; LA32-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0
+; LA32-NEXT: bcnez $fcc0, .LBB18_2
+; LA32-NEXT: # %bb.1: # %if.then
+; LA32-NEXT: ret
+; LA32-NEXT: .LBB18_2: # %if.else
+; LA32-NEXT: fcmp.cle.s $fcc0, $fa0, $fa1
+; LA32-NEXT: movcf2gr $a0, $fcc0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: fcmp_fast_ole:
+; LA64: # %bb.0:
+; LA64-NEXT: movgr2fr.w $fa1, $zero
+; LA64-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0
+; LA64-NEXT: bcnez $fcc0, .LBB18_2
+; LA64-NEXT: # %bb.1: # %if.then
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB18_2: # %if.else
+; LA64-NEXT: fcmp.cle.s $fcc0, $fa0, $fa1
+; LA64-NEXT: movcf2gr $a0, $fcc0
+; LA64-NEXT: ret
+ %cmp = fcmp fast ole float %a, 0.000000e+00
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+ ret i1 %c
+
+if.else:
+ ret i1 %cmp
+}
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