[llvm] b1d7a95 - [LoongArch] Add earlyclobber of destination register to atomic instructions
Weining Lu via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 12 06:10:28 PDT 2022
Author: gonglingqin
Date: 2022-10-12T21:09:21+08:00
New Revision: b1d7a95e4e4a2b57cbe02636bbe357dc48d615c5
URL: https://github.com/llvm/llvm-project/commit/b1d7a95e4e4a2b57cbe02636bbe357dc48d615c5
DIFF: https://github.com/llvm/llvm-project/commit/b1d7a95e4e4a2b57cbe02636bbe357dc48d615c5.diff
LOG: [LoongArch] Add earlyclobber of destination register to atomic instructions
If the AM* atomic memory access instruction has the same register number as
rd and rj, the execution will trigger an Instruction Non-defined Exception.
If the AM* atomic memory access instruction has the same register number as
rd and rk, the execution result is uncertain.
Reference: https://github.com/loongson/LoongArch-Documentation
Differential Revision: https://reviews.llvm.org/D135641
Added:
Modified:
llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
index 657c494dabe17..a0864361a7f61 100644
--- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
@@ -339,7 +339,7 @@ class STORE_2RI14<bits<8> op, string opstr>
"$rd, $rj, $imm14">;
} // mayStore = 1
-let mayLoad = 1, mayStore = 1 in
+let mayLoad = 1, mayStore = 1, Constraints = "@earlyclobber $rd" in
class AM_3R<bits<17> op, string opstr>
: Fmt3R<op, (outs GPR:$rd), (ins GPR:$rk, GPR:$rj), opstr, "$rd, $rk, $rj">;
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
index 300968af8c7ce..5f9695cc792b6 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
@@ -119,7 +119,8 @@ define i32 @atomicrmw_xchg_i32_acquire(ptr %a, i32 %b) nounwind {
;
; LA64-LABEL: atomicrmw_xchg_i32_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: amswap_db.w $a0, $a1, $a0
+; LA64-NEXT: amswap_db.w $a2, $a1, $a0
+; LA64-NEXT: move $a0, $a2
; LA64-NEXT: ret
%1 = atomicrmw xchg ptr %a, i32 %b acquire
ret i32 %1
@@ -138,7 +139,8 @@ define i64 @atomicrmw_xchg_i64_acquire(ptr %a, i64 %b) nounwind {
;
; LA64-LABEL: atomicrmw_xchg_i64_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: amswap_db.d $a0, $a1, $a0
+; LA64-NEXT: amswap_db.d $a2, $a1, $a0
+; LA64-NEXT: move $a0, $a2
; LA64-NEXT: ret
%1 = atomicrmw xchg ptr %a, i64 %b acquire
ret i64 %1
@@ -261,7 +263,8 @@ define i32 @atomicrmw_add_i32_acquire(ptr %a, i32 %b) nounwind {
;
; LA64-LABEL: atomicrmw_add_i32_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: amadd_db.w $a0, $a1, $a0
+; LA64-NEXT: amadd_db.w $a2, $a1, $a0
+; LA64-NEXT: move $a0, $a2
; LA64-NEXT: ret
%1 = atomicrmw add ptr %a, i32 %b acquire
ret i32 %1
@@ -280,7 +283,8 @@ define i64 @atomicrmw_add_i64_acquire(ptr %a, i64 %b) nounwind {
;
; LA64-LABEL: atomicrmw_add_i64_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: amadd_db.d $a0, $a1, $a0
+; LA64-NEXT: amadd_db.d $a2, $a1, $a0
+; LA64-NEXT: move $a0, $a2
; LA64-NEXT: ret
%1 = atomicrmw add ptr %a, i64 %b acquire
ret i64 %1
@@ -403,8 +407,9 @@ define i32 @atomicrmw_sub_i32_acquire(ptr %a, i32 %b) nounwind {
;
; LA64-LABEL: atomicrmw_sub_i32_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: sub.w $a1, $zero, $a1
-; LA64-NEXT: amadd_db.w $a0, $a1, $a0
+; LA64-NEXT: sub.w $a2, $zero, $a1
+; LA64-NEXT: amadd_db.w $a1, $a2, $a0
+; LA64-NEXT: move $a0, $a1
; LA64-NEXT: ret
%1 = atomicrmw sub ptr %a, i32 %b acquire
ret i32 %1
@@ -423,8 +428,9 @@ define i64 @atomicrmw_sub_i64_acquire(ptr %a, i64 %b) nounwind {
;
; LA64-LABEL: atomicrmw_sub_i64_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: sub.d $a1, $zero, $a1
-; LA64-NEXT: amadd_db.d $a0, $a1, $a0
+; LA64-NEXT: sub.d $a2, $zero, $a1
+; LA64-NEXT: amadd_db.d $a1, $a2, $a0
+; LA64-NEXT: move $a0, $a1
; LA64-NEXT: ret
%1 = atomicrmw sub ptr %a, i64 %b acquire
ret i64 %1
@@ -624,8 +630,8 @@ define i8 @atomicrmw_and_i8_acquire(ptr %a, i8 %b) nounwind {
; LA64-NEXT: orn $a1, $a1, $a3
; LA64-NEXT: addi.w $a3, $zero, -4
; LA64-NEXT: and $a0, $a0, $a3
-; LA64-NEXT: amand_db.w $a0, $a1, $a0
-; LA64-NEXT: srl.w $a0, $a0, $a2
+; LA64-NEXT: amand_db.w $a3, $a1, $a0
+; LA64-NEXT: srl.w $a0, $a3, $a2
; LA64-NEXT: ret
%1 = atomicrmw and ptr %a, i8 %b acquire
ret i8 %1
@@ -664,8 +670,8 @@ define i16 @atomicrmw_and_i16_acquire(ptr %a, i16 %b) nounwind {
; LA64-NEXT: orn $a1, $a1, $a2
; LA64-NEXT: addi.w $a2, $zero, -4
; LA64-NEXT: and $a0, $a0, $a2
-; LA64-NEXT: amand_db.w $a0, $a1, $a0
-; LA64-NEXT: srl.w $a0, $a0, $a3
+; LA64-NEXT: amand_db.w $a2, $a1, $a0
+; LA64-NEXT: srl.w $a0, $a2, $a3
; LA64-NEXT: ret
%1 = atomicrmw and ptr %a, i16 %b acquire
ret i16 %1
@@ -686,7 +692,8 @@ define i32 @atomicrmw_and_i32_acquire(ptr %a, i32 %b) nounwind {
;
; LA64-LABEL: atomicrmw_and_i32_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: amand_db.w $a0, $a1, $a0
+; LA64-NEXT: amand_db.w $a2, $a1, $a0
+; LA64-NEXT: move $a0, $a2
; LA64-NEXT: ret
%1 = atomicrmw and ptr %a, i32 %b acquire
ret i32 %1
@@ -705,7 +712,8 @@ define i64 @atomicrmw_and_i64_acquire(ptr %a, i64 %b) nounwind {
;
; LA64-LABEL: atomicrmw_and_i64_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: amand_db.d $a0, $a1, $a0
+; LA64-NEXT: amand_db.d $a2, $a1, $a0
+; LA64-NEXT: move $a0, $a2
; LA64-NEXT: ret
%1 = atomicrmw and ptr %a, i64 %b acquire
ret i64 %1
@@ -736,8 +744,8 @@ define i8 @atomicrmw_or_i8_acquire(ptr %a, i8 %b) nounwind {
; LA64-NEXT: slli.d $a0, $a0, 3
; LA64-NEXT: andi $a1, $a1, 255
; LA64-NEXT: sll.w $a1, $a1, $a0
-; LA64-NEXT: amor_db.w $a1, $a1, $a2
-; LA64-NEXT: srl.w $a0, $a1, $a0
+; LA64-NEXT: amor_db.w $a3, $a1, $a2
+; LA64-NEXT: srl.w $a0, $a3, $a0
; LA64-NEXT: ret
%1 = atomicrmw or ptr %a, i8 %b acquire
ret i8 %1
@@ -768,8 +776,8 @@ define i16 @atomicrmw_or_i16_acquire(ptr %a, i16 %b) nounwind {
; LA64-NEXT: slli.d $a0, $a0, 3
; LA64-NEXT: bstrpick.d $a1, $a1, 15, 0
; LA64-NEXT: sll.w $a1, $a1, $a0
-; LA64-NEXT: amor_db.w $a1, $a1, $a2
-; LA64-NEXT: srl.w $a0, $a1, $a0
+; LA64-NEXT: amor_db.w $a3, $a1, $a2
+; LA64-NEXT: srl.w $a0, $a3, $a0
; LA64-NEXT: ret
%1 = atomicrmw or ptr %a, i16 %b acquire
ret i16 %1
@@ -790,7 +798,8 @@ define i32 @atomicrmw_or_i32_acquire(ptr %a, i32 %b) nounwind {
;
; LA64-LABEL: atomicrmw_or_i32_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: amor_db.w $a0, $a1, $a0
+; LA64-NEXT: amor_db.w $a2, $a1, $a0
+; LA64-NEXT: move $a0, $a2
; LA64-NEXT: ret
%1 = atomicrmw or ptr %a, i32 %b acquire
ret i32 %1
@@ -809,7 +818,8 @@ define i64 @atomicrmw_or_i64_acquire(ptr %a, i64 %b) nounwind {
;
; LA64-LABEL: atomicrmw_or_i64_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: amor_db.d $a0, $a1, $a0
+; LA64-NEXT: amor_db.d $a2, $a1, $a0
+; LA64-NEXT: move $a0, $a2
; LA64-NEXT: ret
%1 = atomicrmw or ptr %a, i64 %b acquire
ret i64 %1
@@ -840,8 +850,8 @@ define i8 @atomicrmw_xor_i8_acquire(ptr %a, i8 %b) nounwind {
; LA64-NEXT: slli.d $a0, $a0, 3
; LA64-NEXT: andi $a1, $a1, 255
; LA64-NEXT: sll.w $a1, $a1, $a0
-; LA64-NEXT: amxor_db.w $a1, $a1, $a2
-; LA64-NEXT: srl.w $a0, $a1, $a0
+; LA64-NEXT: amxor_db.w $a3, $a1, $a2
+; LA64-NEXT: srl.w $a0, $a3, $a0
; LA64-NEXT: ret
%1 = atomicrmw xor ptr %a, i8 %b acquire
ret i8 %1
@@ -872,8 +882,8 @@ define i16 @atomicrmw_xor_i16_acquire(ptr %a, i16 %b) nounwind {
; LA64-NEXT: slli.d $a0, $a0, 3
; LA64-NEXT: bstrpick.d $a1, $a1, 15, 0
; LA64-NEXT: sll.w $a1, $a1, $a0
-; LA64-NEXT: amxor_db.w $a1, $a1, $a2
-; LA64-NEXT: srl.w $a0, $a1, $a0
+; LA64-NEXT: amxor_db.w $a3, $a1, $a2
+; LA64-NEXT: srl.w $a0, $a3, $a0
; LA64-NEXT: ret
%1 = atomicrmw xor ptr %a, i16 %b acquire
ret i16 %1
@@ -894,7 +904,8 @@ define i32 @atomicrmw_xor_i32_acquire(ptr %a, i32 %b) nounwind {
;
; LA64-LABEL: atomicrmw_xor_i32_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: amxor_db.w $a0, $a1, $a0
+; LA64-NEXT: amxor_db.w $a2, $a1, $a0
+; LA64-NEXT: move $a0, $a2
; LA64-NEXT: ret
%1 = atomicrmw xor ptr %a, i32 %b acquire
ret i32 %1
@@ -913,7 +924,8 @@ define i64 @atomicrmw_xor_i64_acquire(ptr %a, i64 %b) nounwind {
;
; LA64-LABEL: atomicrmw_xor_i64_acquire:
; LA64: # %bb.0:
-; LA64-NEXT: amxor_db.d $a0, $a1, $a0
+; LA64-NEXT: amxor_db.d $a2, $a1, $a0
+; LA64-NEXT: move $a0, $a2
; LA64-NEXT: ret
%1 = atomicrmw xor ptr %a, i64 %b acquire
ret i64 %1
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