[PATCH] D132559: [AArch64] Add support for 128-bit non temporal loads.

Wed Oct 12 03:07:03 PDT 2022

zjaffal added a comment.

In D132559#3852103 <https://reviews.llvm.org/D132559#3852103>, @dmgreen wrote:

>> That is very interesting, I will look into what is triggering this issue.
>
> OK thanks. Reverting the patch in the meantime is probably the best idea, I should probably have done that yesterday. Things are pretty broken at the moment and the fix might take a little time.

I will revert it now.

The cause of the issue is that we specify custom lowering operation for `v2i64`

  setOperationAction(ISD::LOAD, MVT::v2i64, Custom);

Which prevents `LegalizeLoadOps`  from creating the necessary code for unaligned loads

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D132559/new/

https://reviews.llvm.org/D132559