[PATCH] D135512: [AArch64][Windows] Check sret attribute also for inreg attribute

[chenglin.bi via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG41f5bbe18b5b: [AArch64][Windows] Check sret attribute also for inreg attribute (authored by bcl5980).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135512/new/

https://reviews.llvm.org/D135512

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/arm64-windows-calls.ll


Index: llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
+++ llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
@@ -176,3 +176,15 @@
   ; CHECK: bl copy_notpod
   ; CHECK-NEXT: stp x0, x1, [{{.*}}]
 }
+
+; We shouldn't return the argument
+; when it has only inreg attribute
+define i64 @foobar(i64* inreg %0) {
+; CHECK-LABEL: foobar:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    ldr x0, [x0]
+; CHECK-NEXT:    ret
+entry:
+  %1 = load i64, i64* %0
+  ret i64 %1
+}
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -6313,7 +6313,7 @@
   // epilogue.
   if (IsWin64) {
     for (unsigned I = 0, E = Ins.size(); I != E; ++I) {
-      if (Ins[I].Flags.isInReg()) {
+      if (Ins[I].Flags.isInReg() && Ins[I].Flags.isSRet()) {
         assert(!FuncInfo->getSRetReturnReg());
 
         MVT PtrTy = getPointerTy(DAG.getDataLayout());


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