[PATCH] D134477: [X86] Lower vector interleave into unpck and perm

[Han Zhu via Phabricator via llvm-commits]

zhuhan0 added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:17786
+                                                 SelectionDAG &DAG) {
+  if (VT != MVT::v32i8 || Mask.size() != 32)
+    return SDValue();
----------------
RKSimon wrote:
> Have you investigated using this for other types?
Not yet. I'll submit another patch to generalize this. Let me first run some benchmarks to confirm that it's profitable.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134477/new/

https://reviews.llvm.org/D134477