[PATCH] D135641: [LoongArch] Add earlyclobber of destination register to atomic instructions

WÁNG Xuěruì via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 10 23:23:21 PDT 2022


xen0n accepted this revision.
xen0n added a comment.

In D135641#3848541 <https://reviews.llvm.org/D135641#3848541>, @xry111 wrote:

> Why didn't we notice this before? :(

Of course it's because RISCV AMO doesn't have this implementation feature/detail/quirk/wart (pick one suitable for you) ;-)


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D135641/new/

https://reviews.llvm.org/D135641



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