[PATCH] D135641: [LoongArch] Add earlyclobber of destination register to atomic instructions

[Gong LingQin via Phabricator via llvm-commits]

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If the AM* atomic memory access instruction has the same register number as
rd and rj, the execution will trigger an Instruction Non-defined Exception.
If the AM* atomic memory access instruction has the same register number as
rd and rk, the execution result is uncertain.

Reference: https://github.com/loongson/LoongArch-Documentation


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D135641

Files:
  llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
  llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll

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