[PATCH] D133399: [DAGCombiner] Fold (mul (sra X, BW-1), Y) -> (neg (and (sra X, BW-1), Y))
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 10 10:46:00 PDT 2022
craig.topper updated this revision to Diff 466547.
craig.topper added a comment.
Add minsize tests to X86 extmul128.ll
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D133399/new/
https://reviews.llvm.org/D133399
Files:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
llvm/test/CodeGen/AMDGPU/mad_64_32.ll
llvm/test/CodeGen/PowerPC/pr45448.ll
llvm/test/CodeGen/RISCV/mul.ll
llvm/test/CodeGen/RISCV/xaluo.ll
llvm/test/CodeGen/Thumb2/mve-vmull-splat.ll
llvm/test/CodeGen/X86/extmul128.ll
llvm/test/CodeGen/X86/muloti.ll
llvm/test/CodeGen/X86/smul_fix_sat.ll
llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
llvm/test/CodeGen/X86/vec_smulo.ll
llvm/test/CodeGen/X86/xmulo.ll
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