[llvm] b6676f3 - [LICM] Add test for single thread model promotion (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 7 08:13:29 PDT 2022
Author: Nikita Popov
Date: 2022-10-07T17:13:09+02:00
New Revision: b6676f3c12588cd1333de9bb3cee3a53bc71771e
URL: https://github.com/llvm/llvm-project/commit/b6676f3c12588cd1333de9bb3cee3a53bc71771e
DIFF: https://github.com/llvm/llvm-project/commit/b6676f3c12588cd1333de9bb3cee3a53bc71771e.diff
LOG: [LICM] Add test for single thread model promotion (NFC)
Tests for D130466.
Added:
llvm/test/Transforms/LICM/promote-single-thread.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LICM/promote-single-thread.ll b/llvm/test/Transforms/LICM/promote-single-thread.ll
new file mode 100644
index 0000000000000..b0127344a523a
--- /dev/null
+++ b/llvm/test/Transforms/LICM/promote-single-thread.ll
@@ -0,0 +1,167 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -licm < %s | FileCheck %s
+
+ at g = external global i32
+ at c = external constant i32
+
+declare void @capture(ptr)
+
+; In single-thread mode both loads and stores can be promoted. In multi-thread
+; mode only loads can be promoted, as a
diff erent thread might write to the
+; global.
+define void @promote_global(i1 %c, i1 %c2) {
+; CHECK-LABEL: @promote_global(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[G_PROMOTED:%.*]] = load i32, ptr @g, align 4
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[V_INC2:%.*]] = phi i32 [ [[V_INC1:%.*]], [[LATCH:%.*]] ], [ [[G_PROMOTED]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[LATCH]]
+; CHECK: if:
+; CHECK-NEXT: [[V_INC:%.*]] = add i32 [[V_INC2]], 1
+; CHECK-NEXT: store i32 [[V_INC]], ptr @g, align 4
+; CHECK-NEXT: br label [[LATCH]]
+; CHECK: latch:
+; CHECK-NEXT: [[V_INC1]] = phi i32 [ [[V_INC]], [[IF]] ], [ [[V_INC2]], [[LOOP]] ]
+; CHECK-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ br i1 %c, label %if, label %latch
+
+if:
+ %v = load i32, ptr @g
+ %v.inc = add i32 %v, 1
+ store i32 %v.inc, ptr @g
+ br label %latch
+
+latch:
+ br i1 %c2, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; The store can never be promoted here, because the global is constant, and
+; the store could trap.
+define void @promote_constant_global(i1 %c, i1 %c2) {
+; CHECK-LABEL: @promote_constant_global(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr @c, align 4
+; CHECK-NEXT: [[V_INC:%.*]] = add i32 [[V]], 1
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[LATCH:%.*]]
+; CHECK: if:
+; CHECK-NEXT: store i32 [[V_INC]], ptr @c, align 4
+; CHECK-NEXT: br label [[LATCH]]
+; CHECK: latch:
+; CHECK-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ br i1 %c, label %if, label %latch
+
+if:
+ %v = load i32, ptr @c
+ %v.inc = add i32 %v, 1
+ store i32 %v.inc, ptr @c
+ br label %latch
+
+latch:
+ br i1 %c2, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; In single-thread mode both loads and stores can be promoted. In multi-thread
+; mode only loads can be promoted, as a
diff erent thread might write to the
+; captured alloca.
+define void @promote_captured_alloca(i1 %c, i1 %c2) {
+; CHECK-LABEL: @promote_captured_alloca(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
+; CHECK-NEXT: call void @capture(ptr [[A]])
+; CHECK-NEXT: [[A_PROMOTED:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[V_INC2:%.*]] = phi i32 [ [[V_INC1:%.*]], [[LATCH:%.*]] ], [ [[A_PROMOTED]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[LATCH]]
+; CHECK: if:
+; CHECK-NEXT: [[V_INC:%.*]] = add i32 [[V_INC2]], 1
+; CHECK-NEXT: store i32 [[V_INC]], ptr [[A]], align 4
+; CHECK-NEXT: br label [[LATCH]]
+; CHECK: latch:
+; CHECK-NEXT: [[V_INC1]] = phi i32 [ [[V_INC]], [[IF]] ], [ [[V_INC2]], [[LOOP]] ]
+; CHECK-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ %a = alloca i32
+ call void @capture(ptr %a)
+ br label %loop
+
+loop:
+ br i1 %c, label %if, label %latch
+
+if:
+ %v = load i32, ptr %a
+ %v.inc = add i32 %v, 1
+ store i32 %v.inc, ptr %a
+ br label %latch
+
+latch:
+ br i1 %c2, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; The store cannot be promoted here, because we do not know whether the
+; argument memory is writable.
+define void @promote_arg(ptr noalias dereferenceable(4) align 4 %arg, i1 %c, i1 %c2) {
+; CHECK-LABEL: @promote_arg(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[ARG_PROMOTED:%.*]] = load i32, ptr [[ARG:%.*]], align 4
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[V_INC2:%.*]] = phi i32 [ [[V_INC1:%.*]], [[LATCH:%.*]] ], [ [[ARG_PROMOTED]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[LATCH]]
+; CHECK: if:
+; CHECK-NEXT: [[V_INC:%.*]] = add i32 [[V_INC2]], 1
+; CHECK-NEXT: store i32 [[V_INC]], ptr [[ARG]], align 4
+; CHECK-NEXT: br label [[LATCH]]
+; CHECK: latch:
+; CHECK-NEXT: [[V_INC1]] = phi i32 [ [[V_INC]], [[IF]] ], [ [[V_INC2]], [[LOOP]] ]
+; CHECK-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ br i1 %c, label %if, label %latch
+
+if:
+ %v = load i32, ptr %arg
+ %v.inc = add i32 %v, 1
+ store i32 %v.inc, ptr %arg
+ br label %latch
+
+latch:
+ br i1 %c2, label %exit, label %loop
+
+exit:
+ ret void
+}
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